參數(shù)資料
型號(hào): M74HC646
廠商: 意法半導(dǎo)體
英文描述: Octal Bus Transceiver/Register(八總線收發(fā)器/寄存器(三態(tài)))
中文描述: 八路總線收發(fā)器/注冊(cè)(八總線收發(fā)器/寄存器(三態(tài)))
文件頁(yè)數(shù): 3/12頁(yè)
文件大?。?/td> 201K
代理商: M74HC646
TRUTH TABLE
HC646 (The truth table for HC648 is the same as this, but with the outputs inverted)
G
DIR
CAB CBA SAB SBA
A
B
FUNCTION
H
X
INPUTS
Z
INPUTS
INPUTS
Z
INPUTS
Both the A bus and the B bus are inputs
The output functions of the A and B bus are disabled
Both the A and B bus are used for inputs to the
internal flip-flops. Data at the bus will be stored on
low to high transition of the clock inputs
The A bus are inputs and the B bus are outputs
The data at the A bus are displayed at the B bus
X
X
X
X
X
X
L
H
INPUTS
L
H
L
H
OUTPUTS
L
H
L
H
X
X*
L
X
X*
L
X
The data at the A bus are displayed at the B bus.
The data of the A bus are stored to the internal
flip-flop on low to high transition of th clock pulse.
X
X*
H
X
X
Qn
The data stored to the internal flip-flop are dispayed
at the B bus
The data at the A bus are stored to the internal flip-
flop on low to high transition of the clock pulse. The
states of the internal flip-flops output directly to the
B bus
X*
H
X
L
H
L
H
L
L
OUTPUTS
L
H
L
H
INPUTS
L
H
L
H
The B bus are inputs and the A bus are outputs
The data at the B bus are displayed at the A bus
X*
X
X
L
X*
X
L
The data at the B bus are displayed at the A bus.
The data of the B bus are stored to the internal flip-
flop on low to high transition of the clock pulse
X*
X
X
H
Qn
X
The data stored to the internal flip-flops are
displayed at the A bus
the data at the B bus are stored to the internal flip-
flop on low to high transition of the clock pulse. The
states of the internal flip-flops output directly to the
A bus
x*
X
H
L
H
L
H
X
Z
Qn
*
: DON’TCARE
:HIGH IMPEDANCE
:THE DATA STOREDTO THE INTERNALFLIP-FLOPSBY MOST RECENT LOWTO HIGHTRANSITIONOF THECLOCK INPUTS
: THEDATA AT THE A ANDB BUS WILLBE STORED TOTHE INTERNALFLIP-FLOPS ONEVERY LOWTOHIGH TRANSITIONOF
THE CLOCK INPUTS
M74HC646/648
3/12
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