參數(shù)資料
型號: M74HC4060
廠商: 意法半導體
元件分類: 通用總線功能
英文描述: 14 Stage Binary Counter/Oscillator(14級二進制計數(shù)器/振蕩器)
中文描述: 14位的二進制計數(shù)器/振蕩器(14級二進制計數(shù)器/振蕩器)
文件頁數(shù): 1/12頁
文件大小: 256K
代理商: M74HC4060
M54HC4060
M74HC4060
March 1993
14 STAGE BINARY COUNTER/OSCILLATOR
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 4060B
B1R
(Plastic Package)
ORDER CODES :
M54HC4060F1R
M74HC4060B1R
M74HC4060M1R
M74HC4060C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
DESCRIPTION
The M54/74HC4060 is a high speed CMOS 14-
STAGE BINARY COUNTER/OSCILLATOR fabri-
cated in silicon gate C
2
MOS technology. It has the
same high speed performance of LSTTL combined
withtrueCMOSlowpower consumption. It operates
ten timesfasterthanmetal-gate C
2
MOS IC (4060B)
with the same power dissipation.
The oscillator configuration allows design of either
RC or crystal oscillator circuits. A high level on the
CLEAR accomplishes the reset function, i.e. all
counter outputs are made low and the oscillator is
disabled.
A negative transition on the clock input increments
the counter. Ten kinds of divided output are pro-
vided ; 4 to 10 and 12 to 14 stage inclusive. The
maximum division available at Q12is 1/16384 f os-
cillator.
The
1
input and the CLEAR input are equipped
with protection circuits against static discharge and
transient excess voltage.
.
HIGH SPEED
f
MAX
= 58 MHz (TYP.) AT V
CC
= 5 V
1/12
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