參數(shù)資料
型號: M74HC390C1R
廠商: 意法半導(dǎo)體
元件分類: 通用總線功能
英文描述: DUAL DECADE COUNTER
中文描述: 雙十進制計數(shù)器
文件頁數(shù): 1/13頁
文件大?。?/td> 266K
代理商: M74HC390C1R
M54HC390
M74HC390
February 1993
DUAL DECADE COUNTER
B1R
(Plastic Package)
ORDER CODES :
M54HC390F1R
M74HC390B1R
M74HC390M1R
M74HC390C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Inter-
nal Con-
DESCRIPTION
The M54/74HC390 is a high speed CMOS DUAL
DECADE COUNTER fabricated in silicon gate
C
2
MOStechnology.Ithas thesame highspeedper-
formance of LSTTL combined with true CMOS low
powerconsumption.
Thisdualdecade counter contains twoindependent
ripple carry counters. Each counter is composed of
a divide-by-two and divide-by-five counter. The
divide-by-two and divide-by-five counters can be
cascaded to form dual decade, dual biquinary, or
various combinations up to a single divide-by-100
counter.
Each 4-bit counter isincremented on thehightolow
transition (negative edge) of the clock input, and
each has an independent clear input. When clear is
set low all four bits of each counter are set to low.
This enables count truncation and allows the im-
plementation of divide-by-N counter configurations.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
.
HIGH SPEED
f
MAX
= 84 MHz (TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN AND FUNCTION COMPATIBLE WITH
54/74LS390
1/13
相關(guān)PDF資料
PDF描述
M74HC390M1R 8-Bit, 3 us DAC, Serial Input, Pgrmable Settling Time/ Power Consumption, Ultra Low Power 8-SOIC -40 to 85
M74HC390B1R DUAL DECADE COUNTER
M74HC4002 DUAL 4 INPUT NOR GATE
M74HC4002B1R DUAL 4 INPUT NOR GATE
M74HC4002C1R DUAL 4 INPUT NOR GATE
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