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參數(shù)資料
| 型號： | M74HC181 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Arithmatic Logic Unit/Function Generator(算術(shù)邏輯芯片/函數(shù)發(fā)生器) |
| 中文描述： | 算術(shù)邏輯單元/函數(shù)發(fā)生器（算術(shù)邏輯芯片/函數(shù)發(fā)生器） |
| 文件頁數(shù)： | 1/13頁 |
| 文件大小： | 211K |
| 代理商： | M74HC181 |
M74HC181
October 1993
ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) at T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
I
OH
= I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V to 6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS181
ORDER CODES :
M74HC181M1R
M74HC181B1R
PIN CONNECTIONS
(top view)
B1R
(Plastic Package)
.
HIGH SPEED
t
PD
= 13 ns(TYP.) AT V
CC
= 5 V
M1R
(MicroPackage)
The 74HC181 is a high speed CMOSARITHMETIC
LOGIC UNIT/FUNCTION GENERATOR fabricated
with silicon gate C
2
MOS technology. It has the same
highspeedperformance ofLSTTLcombinedwithtrue
CMOS low power consumption. These circuits per-
form 16 binary arithmetic operations on two 4-bit
words as shown in tables 1 and 2. These operations
are selected by the fourfunction-select lines (S0, S1,
S2,S3) andinclude addition, subtraction, decrement,
and straight transfer. When performing arithmetic
manipulations, theinternal carriesmustbeenabled by
applying a low-levelvoltage to themode controlinput
(M).Afullcarrylook-ahead scheme ismade available
in these devices for fast, simultaneous carry gener-
ationby means of two cascade-outputs (pins15 and
17)forthefourbitsinthepackage. Whenused in con-
junction with theM54HC182 or M74HC182, fullcarry
look-ahead circuits, high-speed arithmetic operations
canbe performed. These circuitswill accomodate ac-
tive-highoractive-lowdata, ifthepindesignations are
interpreted as shown below. Subtraction is accom-
plished by 1,s complement addition where the 1’s
complementofthesubtrahendisgenerated internally.
The resultant output is1–B–1, which requires anend-
around or forced carry to produce A–B. The 181 can
also beutilized as a comparator. The A = B output is
internally decoded from the function outputs (F0, F1,
F2, F3)so that when two words of equal magnitude
areappliedatthe AandBinputs, itwill assumeahigh
level toindicated equality (A=B).The ALUshould be
DESCRIPTION
* Opendrain Output Structure
1/13
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M74HC181B1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR |
| M74HC181M1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR |
| M74HC182 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:FUNCTION LOOK AHEAD CARRY GENERATOR |
| M74HC182B1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:FUNCTION LOOK AHEAD CARRY GENERATOR |
| M74HC182C1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:FUNCTION LOOK AHEAD CARRY GENERATOR |
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