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參數(shù)資料
| 型號(hào)： | M74HC139TTR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | DUAL 2 TO 4 DECODER/DEMULTIPLEXER |
| 中文描述： | 雙2至4譯碼器/解復(fù)用器 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 239K |
| 代理商： | M74HC139TTR |
M54HC139
M74HC139
February 1993
DUAL 2 TO 4 DECODER/DEMULTIPLEXER
B1R
(Plastic Package)
ORDER CODES :
M54HC139F1R
M74HC139B1R
M74HC139M1R
M74HC139C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
INPUT AND OUTPUT EQUIVALENT CIRCUIT
DESCRIPTION
The M54/74HC139 is a high speed CMOS DUAL
TWO LINE TO FOUR LINE DECODER/DEMULTI-
PLEXER fabricated insilicon gate C
2
MOS technol-
ogy. It has the same high speed performance of
LSTTL combined with true CMOS low power con-
sumption. The active low enable input can be used
for gating or as a data input for demultiplexing ap-
plications. While the enable input is held high, all
four outputs are high independently of the other in-
puts. Allinputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
.
HIGH SPEED
t
PD
= 12 ns(TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS139
1/9
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