參數(shù)資料
型號(hào): M68AW511AM70NC1T
廠商: 意法半導(dǎo)體
英文描述: 4 Mbit (512K x8) 3.0V Asynchronous SRAM
中文描述: 4兆位(為512k × 8)3.0V異步SRAM
文件頁數(shù): 17/18頁
文件大小: 132K
代理商: M68AW511AM70NC1T
17/18
M68AW511A
REVISION HISTORY
Table 13. Document Revision History
Date
Version
Revision Details
August 2001
1.0
First Issue
27-Sep-2001
2.0
55ns speed class replaces 70ns
27-Feb-2002
3.0
From Preliminary Data to Data Sheet
70ns speed class added
Temperature Range 1 (0 to 70°C) added
Block Diagram clarified (Figure 4)
Operating and AC Measurement Conditions table clarified (Table 3)
AC Measurement Load Circuit clarified (Figure 6)
DC Characteristics table clarified (Table 5)
Write, Read and Standby Mode AC Characteristics tables clarified (Table 8 and 7)
Chip Enable Controlled, Write AC Waveforms clarified (Figure 11)
Low V
CC
Data Retention AC Waveforms and Characteristics clarified (Figure 12 and
Table 9)
01-Mar-2002
4.0
SO32 package added
25-Mar-2002
5.0
Read and Standby Mode AC Characteristics table clarified (Table 7)
Low V
CC
Data Retention AC Waveforms and Characteristics clarified (Figure 12 and
Table 9)
26-Apr-2002
6.0
DC Characteristics Table clarified (Table 5)
Write Mode AC Characteristics Table clarified (Table 8)
17-Jun-2002
6.1
Minor changes
09-Sep-2002
6.2
Load Capacitance (C
L
) changed from 100pF to 30pF (Table 3)
02-Oct-2002
6.3
New part number added.
09-Oct-2002
6.4
Commercial code modified.
12-Jun-2003
6.5
Correction to wording in Operating Modes table
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