參數(shù)資料
型號(hào): M68AW256MN55ZB1T
廠商: 意法半導(dǎo)體
英文描述: 4 Mbit (256K x16) 3.0V Asynchronous SRAM
中文描述: 4兆位(256K × 16)3.0V異步SRAM
文件頁(yè)數(shù): 8/20頁(yè)
文件大?。?/td> 161K
代理商: M68AW256MN55ZB1T
M68AW256M
8/20
Table 4. Capacitance
Note: 1. Sampled only, not 100% tested.
2. At T
A
= 25°C, f = 1 MHz, V
CC
= 3.0V.
Table 5. DC Characteristics
Note: 1. Average AC current, cycling at t
AVAV
minimum.
2. E = V
IL
, LB OR/AND UB = V
IL
, V
IN
= V
IL
OR V
IH
.
3. E
0.2V, LB OR/AND UB
0.2V, V
IN
0.2V OR V
IN
V
CC
–0.2V.
4. Output disabled.
Symbol
Parameter
(1,2)
Test
Condition
Min
Max
Unit
C
IN
Input Capacitance on all pins (except DQ)
V
IN
= 0V
8
pF
C
OUT
Output Capacitance
V
OUT
= 0V
10
pF
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
I
CC1 (1,2)
Operating Supply Current
V
CC
= 3.6V, f = 1/t
AVAV
,
I
OUT
= 0mA
70ns
20
mA
55ns
26
mA
I
CC2 (3)
Operating Supply Current
V
CC
= 3.6V, f = 1MHz,
I
OUT
= 0mA
2
mA
I
SB
Standby Supply Current CMOS
V
CC
= 3.6V, f = 0,
E
V
CC
–0.2V or
LB=UB
V
CC
–0.2V
5
10
μA
I
LI
Input Leakage Current
0V
V
IN
V
CC
–1
1
μA
I
LO
Output Leakage Current
0V
V
OUT
V
CC(4)
–1
1
μA
V
IH
Input High Voltage
2.2
V
CC
+ 0.3
V
V
IL
Input Low Voltage
–0.3
0.6
V
V
OH
Output High Voltage
I
OH
= –1.0mA
2.4
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
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