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參數(shù)資料
| 型號： | M68AW064FZB |
| 廠商： | 意法半導體 |
| 英文描述： | 1 Mbit 64K x16 3.0V Asynchronous SRAM |
| 中文描述： | 1兆位64K的x16 3.0V異步SRAM |
| 文件頁數(shù)： | 13/18頁 |
| 文件大小： | 265K |
| 代理商： | M68AW064FZB |
13/18
M68AW064F
Table 8. Write Mode AC Characteristics
Note: 1. At any given temperature and voltage condition, t
WLQZ
is less than t
WHQX
for any given device.
2. C
L
= 5pF.
Symbol
Parameter
M68AW064F
Unit
55
70
Min
Max
Min
Max
t
AVAV
Write Cycle Time
55
70
ns
t
AVEH
Address Valid to Chip Enable High
45
60
ns
t
AVEL
Address valid to Chip Enable Low
0
0
ns
t
AVWH
Address Valid to Write Enable High
45
60
ns
t
AVWL
Address Valid to Write Enable Low
0
0
ns
t
BLEH
LB, UB Low to Chip Enable High
45
60
ns
t
BLWH
LB, UB Low to Write Enable High
45
60
ns
t
DVEH
Input Valid to Chip Enable High
25
30
ns
t
DVWH
Input Valid to Write Enable High
25
30
ns
t
EHAX
Chip Enable High to Address Transition
0
0
ns
t
EHDX
Chip enable High to Input Transition
0
0
ns
t
ELEH
Chip Enable Low to Chip Enable High
45
60
ns
t
WHAX
Write Enable High to Address Transition
0
0
ns
t
WHDX
Write Enable High to Input Transition
0
0
ns
t
WHQX (1)
Write Enable High to Output Transition
5
5
ns
t
WLQZ (1,2)
Write Enable Low to Output Hi-Z
25
25
ns
t
WLWH
Write Enable Low to Write Enable High
40
50
ns
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