參數(shù)資料
型號(hào): M66592FP
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 0.50 MM PITCH, LQFP-64
文件頁(yè)數(shù): 21/40頁(yè)
文件大小: 1583K
代理商: M66592FP
M66592F P/W G
Rev 1.00 2004.10.01 page 28 of 125
D0 transaction counter register [D0FIFOTRN]
<Address: 28H>
D1 transaction counter register [D1FIFOTRN]
<Address: 2EH>
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TRNCNT
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
Bit
Name
Function
S/W
H/W
Note
15-0 TRNCNT
Transaction counter
Writing: Sets the number of DMA transfer
transactions.
Reding: Reads the number of transactions.
R/W
R
3.4.2
*12)
Note
*12) The transaction counter is valid when data is being read from the buffer memory.
The number of transactions can be read while counting is taking place only if the TRENB bit of the DxFIFOSEL
register is “1”. If “TRENB=0”, the set number of transactions can be read.
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