- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98008 > M66290AFP UNIVERSAL SERIAL BUS CONTROLLER, PQFP48 PDF資料下載
參數(shù)資料
| 型號： | M66290AFP |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP48 |
| 封裝： | TQFP-48 |
| 文件頁數(shù)： | 10/54頁 |
| 文件大?。?/td> | 452K |
| 代理商： | M66290AFP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當(dāng)前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁
USB DEVICE CONTROLLER
M66290AGP/FP
MITSUBISHI <DIGITAL ASSP>
17
Reset
Function
Name
Bit
Name
Bit
R
-
00h
Write/Read "0"
EPB_RDY
[5:0]
Endpoint5-0 buffer
ready
interrupt
When buffer becomes ready (read/write enabled) to each endpoint,
the bit which corresponds to the number of endpoint changes to "1".
The factor of the interrupt is different by the transfer condition of each
endpoint.
1. As to EP0
This bit changes to "1" when receive buffer(OUT) became ready
(read enabled) in control write transfer.
If it is set to control write continuous receive mode or completed
receiving of the data of 255Bytes or received short data packet,
this bit changes to "1".
This bit is not changed even if the transmission buffer(IN) became
ready (write enabled) in control read transfer.
The ready state of the transmission buffer(IN) can be known by the
buffer empty interrupt.
2. As to EP1 to EP5, when CPU access
This bit changes to "1" when each buffer of each endpoint became
ready(read/write enabled).
This bit also changes to "1" when set the direction of the transfer to IN
in initialization.
3. As to EP1 to EP5, when DAM access
If the direction of the transfer is set to OUT, this bit changes to "1"
when received short data packet and then completed DMA transfer
of received data.
In this case, clear is only available to write the BCLR command.
This bit is not changed if the direction of transfer is set to IN.
Clearance of this flag is different by the transfer direction of endpoint.
1. If the transfer direction is OUT
After set the number of the object endpoint to the "FIFO Selection
Register", write BCLR command or read all data of the buffer, then
flag is cleared.
(When DMA access, clearance is only available to write BCLR
command)
2. If the direction is IN
After set the number of the object endpoint to the "FIFO Selection
Register", write IVAL command or write data into the buffer of maximum
packet size (buffer size, if in continuous transmission mode ), then
flag is cleared.
Reserved
5 to 0
15 to 6
W/R
USB
S/W
H/W
EPB_RDY[5:0]
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D15
D13
D14
(2-6) Interrupt Status Register 1 (Address : 1Ah)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M66291GP | UNIVERSAL SERIAL BUS CONTROLLER, PQFP48 |
| M68HC08AZ0 | 8-BIT, EEPROM, 8 MHz, MICROCONTROLLER, PQFP100 |
| M69030 | GRAPHICS PROCESSOR, PBGA278 |
| MA4T85633 | C BAND, Si, NPN, RF SMALL SIGNAL TRANSISTOR |
| MA4T85600 | Si, RF POWER TRANSISTOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M66290AGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:USB DEVICE CONTROLLER |
| M66291GP | 制造商:Renesas Electronics Corporation 功能描述: |
| M66291GP#201 | 制造商:Renesas Electronics Corporation 功能描述:IC ASSP USB2.0 DEVICE CONTROLLER 48LQFP |
| M66291GP#RB0S | 功能描述:IC USB CONTROLLER GEN-PUR 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| M66291GPRB0S | 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Device Controller,LQFP48 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。