- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370991 > M66238FP (Mitsubishi Electric Corporation) STANDARD CLOCK GENERATOR WITH PLL FREQUENCY SYNTHESIZER PDF資料下載
參數(shù)資料
| 型號： | M66238FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | STANDARD CLOCK GENERATOR WITH PLL FREQUENCY SYNTHESIZER |
| 中文描述： | 標(biāo)準(zhǔn)時鐘發(fā)生器，鎖相環(huán)頻率合成器 |
| 文件頁數(shù)： | 7/11頁 |
| 文件大小： | 102K |
| 代理商： | M66238FP |
7
MITSUBISHI
DIGITAL ASSP
M66238FP
STANDARD CLOCK GENERATOR WITH PLL FREQUENCY SYNTHESIZER
2. Sync clock spike removal mode upon occurrence of
trigger
When address (A1, A0)=(1, 0) and data (D6, D5, D4, D3, D2,
D1, D0)=(0, 1, 1, 0, 1, 0, 0), CKO with the first rise after oc-
currence of a trigger is output and then CKO stops.
However, this mode is not available when D1=1 in trigger
edge setting. Set a wide TR so that TR sync edge is entered
200ns or more after CKO stops.
1) 200ns or more required
2) Note: tss (CKO, CKOB, PULSE) is defined by input clock
width "L" +
α
. In addition, the value of
α
denotes IC internal
delay, and the values of
α
and tss are definite unless tem-
perature, Vcc, etc. are changed, and tss variations at that
time is defined as
t (sync accuracy: jitter).
CKO/PLLO output frequency range
The M66238 requires an internal VCO oscillator frequency of
25MHz to 50MHz.
Settings of dividing ratio K of 12-bit divider and dividing ratio
N of 15-bit counter are required in order to determine the in-
ternal VCO oscillator frequency. The relation between the
settings and the internal VCO oscillator frequency is shown
below.
Oscillator frequency
3) Note: Setting of fin/K
≥
100kHz is recommended in consid-
eration of the frequency accuracy characteristics of PLL out-
put.
Therefore, set the division ratio K of the 12 bit divider and the
division ratio N of the 15 bit counter to meet the following con-
ditions:
25MHz
≤
fvco
≤
50MHz
In addition, for PLLO and CKO, setting the division ratios of
the sync/division circuit (synchronous clock generating area)
to 1/1, 1/2, 1/4, 1/8, 1/16, 1/32 will allow the frequencies of
0.78Hz - 50MHz to be accommodated.
fin
×
N
K
f
VCO
=
(MHz)
K=
∑
(D
k
×
2
k
)
k = 0
N=
∑
(D
n
×
2
n–12
)
n = 12
11
26
TR
tw(TR)
1st
tss(CKO)
200ns or more required
tss(CKOB)
tss(PULSE)
tw(PULSE)
t
t
t
CKO
CKOB
PULSE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M66240 | 4-CH 16-BIT PWM GENERATOR |
| M66240FP | 4-CH 16-BIT PWM GENERATOR |
| M66240P | 4-CH 16-BIT PWM GENERATOR |
| M66242FP | 4-CH 12-BIT PWM GENERATOR |
| M66242P | 4-CH 12-BIT PWM GENERATOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M66238FP(#TF0T) | 制造商:Renesas Electronics Corporation 功能描述: |
| M66239FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:High Speed Standard Clock Generator With Frequency Synthesizer |
| M66239FP(#RB0S) | 制造商:Renesas Electronics Corporation 功能描述: |
| M66240 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4-CH 16-BIT PWM GENERATOR |
| M66240FP | 功能描述:IC REG CTRLR PWM 24SOP RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標(biāo)準(zhǔn)包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。