參數(shù)資料
型號(hào)： M65818AFP
廠商： Renesas Technology Corp.
英文描述： Digital Amplifier Processor of S-Master Technology
中文描述： 數(shù)字放大器處理器的S - Master技術(shù)
文件頁(yè)數(shù)： 1/39頁(yè)
文件大?。?/td> 384K
代理商： M65818AFP
Rev.1.00, Sep.04.2003, page 1 of 38
M65818AFP
Digital Amplifier Processor of S-Master* Technology
REJ03F0019-0100Z
Rev.1.00
Sep.04.2003
Description
The M65818AFP is a S-Master technique processor for digital amplifier enable to convert from multi liner-PCM digital
input signal to high precise switching-pulse digital output without analog processing.
The M65818AFP has built-in 24bit sampling rate converter and digital-gain-controller.
The M65818AFP enables to realize high precise (X`tal oscillation precision) fully digital amplifier systems combining
with power driver IC.
Features
Built-in 24bit Sampling Rate Converter.
Input Signal Sampling Rate
from 32KHz to 192KHz(24bit Maximum).
4 kinds of Digital Input Format.
Built-in L/R Independent Digital Gain Control.
Built-in Soft Mute Function with Exponential Approximate-Curve.
Correspondence for SACD signal (64Fs 1bit,Fs=44.1KHz).
Direct Output from Sampling Rate Converter.
3.3V and 5.0V Power Supply Operation at Output Clock, Input Data, and Control Signal Port
Main Applications
Master Clock
Primary Clock: 256Fsi/512Fsi Secondary Clock: 1024Fso/512Fso
Input Signal Format:
MSB First Right Justified(16/20/24bit),MSB First Left Justified(24bit)
LSB First Right Justified(24bit),I2S(24bit)
Input Signal Sampling Rate from 32kHz to 192kHz.
8Fs Input Mode: Correspondence for External Digital Filter, Sampling Rate Converter Outputs.
Gain Control Function:
+30dB~ -
∞
dB(0.1dB Step until -96dB, -138dB Minimum)
Third Order
Σ
(16Fso:6bit/5bit,32Fso: 5bit)
Sampling Rate Converter Output :MSB First Left justified /Lch,Rch Independent/32BCK
Recommended Operating Conditions
Logic Block:3.3V±10%, PWM Buffer Block : 5.0V±10%
(** "S-Master" is the digital amplifier technology developed by Sony Corporation.
"S-Master" is a trademark of Sony Corporation.
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