參數(shù)資料
型號: M62023
廠商: Mitsubishi Electric Corporation
英文描述: SYSTEM RESET IC WITH SWITCH FOR MEMORY BACK-UP
中文描述: 系統(tǒng)復位IC具有內存背面的開關,向上
文件頁數(shù): 3/4頁
文件大?。?/td> 47K
代理商: M62023
MITSUBISHI <Dig./Ana.INTERFACE>
M62023L,P,FP
1997.5.30- rev
( / )
PRELIMINARY
Some parametric limits are subject to change.
V
BAT
Com
1.24V
3
R
1
R
2
7
5
V
IN
RES
RES
MCU
or
CPU
+3V
(MAIN POWER SUPPLY)
V
DD
C
IN
GND
RESET
CIRCUIT
SW
DELAY
CIRCUIT
6
M62023
D
1
1
8
4
2
V
OUT
V
BAT
CS
C
t
V
DD
BATTERY
3V
CMOS
RAM
C
OUT
C
t
EXPLANATION OF TERMINALS
V
IN
and V
BAT
are controlled by means of an internal switch and output through
V
OUT
.
The pin is capable of outputting up to 100 mA. Use it as V
DD
of CMOS RAM
and the like.
Backup power supply is connected to this pin.
If a lithium battery is used, insert a resistor in series for safety purposes.
+3V input pin. Connect to a logic power supply.
A delay capacitor is connected to this pin. By connecting a capacitor, it is
possible to delay each output.
Connect to the positive reset input of a microcontroller. The pin is capable of
flowing 1mA sink current.
Reference for all signals
Connect to the negative reset input of a microcontroller. The pin is capable of
flowing 1mA sink current.
Connect to the
chip select
of RAM. The CS output is at low level in normal state
thereby letting RAM be active. Under failure or backup condition, the CS
output is set to high level, then RAM enters standby state disabling read/write
function. The pin is capable of flowing a 1mA sink current.
Power supply output
Backup power supply
input
Power supply input
Delay capacitor
connection pin
Pin No.
Name
Function
V
IN
Positive reset output
Ground
Negative reset output
Chip select output
1
2
3
4
5
6
7
8
Symbol
V
OUT
C
t
RES
GND
CS
RES
APPLICATION EXAMPLE
Capacitance to be connected: C
IN
: 10μF; C
OUT
: 4.7μF; C
t
: 4.7μF
相關PDF資料
PDF描述
M62023L SYSTEM RESET IC WITH SWITCH FOR MEMORY BACK-UP
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