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參數(shù)資料
| 型號(hào)： | M62021FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SYSTEM RESET IC WITH SWITCH FOR MEMORY BACK-UP |
| 中文描述： | 系統(tǒng)復(fù)位IC具有內(nèi)存背面的開(kāi)關(guān)，向上 |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大?。?/td> | 112K |
| 代理商： | M62021FP |
( 5
ELECTRIC
MITSUBISHI
M62021L,P,FP
MITSUBISHI<Dig.Ana.INTERFACE>
SYSTEM RESET IC WITH SWITCH FOR MEMORY BACK-UP
CONFIGURATION
<Power supply detector>
The internal reference voltage Vref is compared by means of
a comparator with resistor-divided voltage VR(resistor-divided
voltage produced by R1 and R2 from VIN).
If the input voltage is 5V,VR is set to 1.24V or higher,so the
comparator output is at low level and the Ct output(Q1
collector output)is set to high level.If the input voltage drops to
below 4.4V in an abnormal condition,VR becomes below
1.24V,so the comparator output goes from low to high level
and the Ct output,from high to low.The input voltage at this
point is called VSL.Next,when the input voltage,restored from
abnormal state,has a rise,the comparator output goes from
high to low level and the Ct output,from low to high.
The comparator used for detection has 100mV
hysteresis(
Vs),so that malfunctioning is prevented in case
that the input voltage slowly drops or VR nearly equals Vref.
<Delay Circuit>
Connecting an external capacitor to the Ct pin lets
RES,RES,CS,and VOUT be delayed due to RC transient
phenomenon(electric charge).
Delay time is determined as follows.
Delay time(tpd)= Ct X (R3 + R4) X In
[VOH(Ct)-INV1(VTH)]
[VOH(Ct)-VOL(Ct)]
=Ct X 22k
X 0.2614
..
=5.75 X 10 X Ct *Ct is an external capacitance.
Taking into consideration the time taken by the oscillator of
microcomputer to be stable,connect a 4.7μF capacitor to the
Ct pin.
(As the response time of detection can be slowed due to
internal structure depending on the rising rate of power
supply,avoid connecting a too large capacitance.
<Schmitt trigger circuit>
Since waveforms show a gentle rise due to the RC delay
circuit,INV1,INV2,R5,and R6 constitute a schmitt trigger circuit
to produce hysteresis so as to prevent each output from
chattering.
INTERNAL CIRCUIT
5
4
3
2
1
0
4.0 4.2 4.4 4.6 4.8 5.0
INPUT VOLTAGE V
IN
(V)
V
SL
V
SH
Vs
tpd
V
OH
(Ct)
INV1(Vth)
V
OL
(Ct)
DELAYED OUTPUT WAVEFORMS OF Ct
1
2
8
6
7
5
3
4
Ct
V
IN
RES
RES
V
OUT
V
BAT
CS
GND
R1
60.94k
Q5
D1
Q4
Q3
Com
Q1
INV8
INV9
INV3 INV4
INV5 INV6 INV7
R4
47
R5
10k
R6
R3
22k
R9
5k
R10
22k
R7
10k
R8
10k
R2
24K
Vref
1.24V
INV1 INV2
800
R10
R11
10k
Q2
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