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參數資料
| 型號： | M5M5V408BKR |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM |
| 中文描述： | 4194304位（524288 - Word的8位）的CMOS靜態(tài)RAM |
| 文件頁數： | 3/14頁 |
| 文件大?。?/td> | 162K |
| 代理商： | M5M5V408BKR |
MITSUBISHI ELECTRIC
M5M5V408BFP/TP/RT/KV/KR
revision-K1.0e, ' 98.09.07
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM
MITSUBISHI LSIs
FUNCTION TABLE
BLOCK DIAGRAM
3
Mode
DQ
Icc
S
W
OE
Write
Read
Read
H
L
L
L
L
H
H
X
L
H
X
X
Non selection
High-impedance
High-impedance
Data input (D)
Data output (Q)
Active
Active
Active
Standby
A
4
A
5
A
6
A
7
A
12
A
14
A
16
A
17
A
18
A
15
A
11
A
9
A
8
A
13
12
A
0
A
1
A
2
A
3
11
10
9
25
26
27
28
8
7
6
5
4
3
2
30
1
31
A
10
23
DQ
1
DQ
2
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
DQ
8
V
CC
(3V)
GND
(0V)
W
OE
S
24
13
14
15
17
32
22
18
19
20
21
29
16
A0 ~ A18
DQ1 ~ DQ8
S
W
OE
Vcc
GND
Address input
Data input / output
Chip select input
Write control input
Output inable input
Power supply
Ground supply
Pin
Function
MEMORY ARRAY
524288 WORDS
x 8 BITS
CLOCK
GENERATOR
FUNCTION
The M5M5408BFP,TP,RT,KV,KR is organized as 524,288-
words by 8-bit. These devices operate on a single +2.7~3.6V
power supply, and are directly TTL compatible to both input
and output. Its fully static circuit needs no clocks and no
refresh, and makes it useful.
A write operation is executed during the S low and W low
overlap time. The address(A0~A18) must be set up before
the write cycle
A read operation is executed by setting W at a high level
and OE at a low level while S are in an active state(S=L).
When setting S at a high level, the chips are in a non-
selectable mode in which both reading and writing are
disabled. In this mode, the output stage is in a high-impedance
state, allowing OR-tie with other chips. Setting the OE at a high
level,the output stage is in a high-impedance state, and the
data bus contention problem in the write cycle is eliminated.
The power supply current is reduced as low as 0.3μA(25°C,
typical), and the memory data can be held at +2V power
supply, enabling battery back-up operation during power failure
or power-down operation in the non-selected mode.
20
19
18
17
1
2
3
4
16
15
14
13
12
11
10
9
6
7
31
32
21
22
23
25
8
30
26
27
28
29
5
24
M5M5V408BKV/KR
M5M5V408B
FP/TP/RT
M5M5V408BKV/KR
M5M5V408B
FP/TP/RT
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相關代理商/技術參數 |
參數描述 |
|---|---|
| M5M5V408BKR-10H | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM |
| M5M5V408BKR-10HI | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM |
| M5M5V408BKR-10HW | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM |
| M5M5V408BKR-10L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM |
| M5M5V408BKR-10LI | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM |
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