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參數(shù)資料
| 型號： | M5M5V216AWG-55HI |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM |
| 中文描述： | 2097152位（131072字由16位）的CMOS靜態(tài)RAM |
| 文件頁數(shù)： | 4/7頁 |
| 文件大?。?/td> | 134K |
| 代理商： | M5M5V216AWG-55HI |
MITSUBISHI ELECTRIC
M5M5V216AWG
revision-01, ' 98.12.08
2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM
MITSUBISHI LSIs
4
AC ELECTRICAL CHARACTERISTICS
(Vcc=2.7 ~ 3.6V, unless otherwise noted)
1TTL
CL
DQ
Input rise time and fall time
Reference level
Output loads
2.7V~3.6V
V
IH
=2.2V,V
IL
=0.4V
5ns
V
OH
=V
OL
=1.5V
Transition is measured ±500mV from
steady state voltage.(for t
en
,t
dis
)
Fig.1,CL=30pF
CL=5pF (for ten,tdis)
(1) TEST CONDITIONS
Supply voltage
Input pulse
Fig.1 Output load
Including scope and
jig capacitance
Output disable time after S high
Output disable time after BC1 high
Output disable time after BC2 high
Output disable time after OE high
Output enable time after S low
t
CR
t
a
(A)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
a
(S)
t
a
(BC1)
t
a
(BC2)
t
a
(OE)
t
dis
(S)
t
dis
(BC1)
t
dis
(BC2)
t
dis
(OE)
t
en
(S)
t
en
(BC1)
t
en
(BC2)
t
en
(OE)
t
V
(A)
(2) READ CYCLE
Symbol
Parameter
Units
Read cycle time
Address access time
Chip select access time
Byte control 1 access time
Byte control 2 access time
Output enable access time
Data valid time after address
Output enable time after BC1 low
Output enable time after BC2 low
Output enable time after OE low
(3) WRITE CYCLE
t
su
(A-WH)
t
su
(BC1)
t
su
(BC2)
t
CW
t
w
(W)
t
su
(A)
t
su
(S)
t
su
(D)
t
h
(D)
t
rec
(W)
t
dis
(W)
t
dis
(OE)
t
en
(W)
t
en
(OE)
Chip select setup time
Data setup time
Data hold time
Write recovery time
Output disable time from W low
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Symbol
Parameter
Units
Write cycle time
Write pulse width
Address setup time
Address setup time with respect to W
Byte control 1 setup time
Byte control 2 setup time
Output disable time from OE high
Output enable time from W high
Output enable time from OE low
70
10
10
10
5
10
35
25
25
25
25
Limits
Max
Min
70
70
70
70
70
55
0
65
65
65
65
30
0
0
Limits
Max
Min
25
25
5
5
55
10
10
10
5
10
30
20
20
20
20
Max
Min
55
55
55
55
M5M5V216AWG - 70
M5M5V216AWG - 55
55
45
0
50
50
50
50
25
0
0
Max
Min
20
20
5
5
M5M5V216AWG - 70
M5M5V216AWG - 55
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| M5M5V216AWG | 2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM |
| M5M5V216ART | Octal Buffers/Drivers With 3-State Outputs 20-TSSOP -40 to 85 |
| M5M5V216ATP | Octal Buffers/Drivers With 3-State Outputs 20-TSSOP -40 to 85 |
| M5M5V216AWG-55HW | 2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM |
| M5M5V216AWG-55L | 2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M5V216AWG-55HW | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM |
| M5M5V216AWG-55L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM |
| M5M5V216AWG-55LI | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM |
| M5M5V216AWG-55LW | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM |
| M5M5V216AWG-70H | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM |
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