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| 型號(hào)： | M5M51R16AWG-15H |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| 中文描述： | 1048576位（65536字由16位）的CMOS靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 4/7頁(yè) |
| 文件大小： | 84K |
| 代理商： | M5M51R16AWG-15H |
MITSUBISHI LSIs
1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM
M5M51R16AWG -10L, -12L, -15L,
-10H, -12H, -15H
MITSUBISHI
ELECTRIC
Aug.1. 1998
4
AC ELECTRICAL CHARACTERISTICS
( Ta = 0 ~ 70°C, Vcc = 1.8V~2.7V, unless otherwise noted )
(1) MEASUREMENT CONDITIONS
Input pulse level V
IH
= 0.7 x Vcc + 0.2V, V
IL
= 0.2V
Input rise and fall time 5ns
Reference level V
OH
= 0.9V, V
OL
= 0.9V
Output loads Fig.1,C
L
= 30pF
C
L
= 5pF ( for
t
en,
t
dis )
Transition is measured ±200mV from steady
state voltage. ( for
t
en,
t
dis )
DQ
Fig.1 Output load
C
L
( Including scope
and JIG )
1 TTL
(3)WRITE CYCLE
Symbol
Parameter
Write cycle time
Write pulse width
Address set up time
Address set up time with respect to W
BC1 setup time
BC2 setup time
Data set up time
Data hold time
Write recovery time
Output disable time after W low
Output disable time after OE high
Chip select set up time
Output enable time after W high
Output enable time after OE low
Output enable time after BC1 low
Output enable time after BC2 low
t
CW
t
w(W)
t
su(A)
t
su(A-WH)
t
su(BC1)
t
su(BC2)
t
su(S)
t
su(D)
t
h(D)
t
rec(W)
t
dis(W)
t
dis(OE)
t
en(W)
t
en(OE)
t
en(BC1)
t
en(BC2)
120
85
0
100
100
100
55
0
0
100
5
5
40
40
10
10
Unit
-15L,-15H
Min
150
Max
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Limits
-12L,-12H
Min
Max
-10L,-10H
Min
100
Max
0
75
50
0
0
85
85
85
5
5
35
35
10
10
0
100
60
0
0
120
120
120
5
5
50
50
10
10
85
120
(2)READ CYCLE
Symbol
Parameter
Unit
-15L,-15H
Min
150
Max
Output enable access time
Output disable time after S high
Output disable time after BC1 high
Output disable time after BC2 high
Output disable time after OE high
ns
ns
ns
75
50
50
ns
ns
ns
ns
50
50
Read cycle time
Address access time
Chip select access time
ns
ns
ns
ns
150
150
150
BC1 access time
BC2 access time
ns
150
Output enable time after S low
Output enable time after BC1 low
Output enable time after BC2 low
Output enable time after OE low
ns
ns
10
5
Data valid time after address change
ns
10
10
10
t
CR
t
a(A)
t
a(S)
t
a(BC1)
t
a(BC2)
t
a(OE)
t
dis(S)
t
dis(BC1)
t
dis(BC2)
t
dis(OE)
t
en(S)
t
en(BC1)
t
en(BC2)
t
en(OE)
t
V
(A)
Limits
-12L,-12H
Min
120
Max
60
40
40
40
40
120
120
120
120
10
5
10
10
10
-10L,-10H
Min
100
Max
50
35
35
35
35
100
100
100
100
10
5
10
10
10
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M51R16AWG-15HI | 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| M5M51R16AWG-15L | 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| M5M51R16AWG-15LI | 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| M5M5255DP-45LL | 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:262,144-BIT (32,768-WORD BY 8-BIT) CMOS STATIC RAM |
| M5M5255DP-45XL | 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:262,144-BIT (32,768-WORD BY 8-BIT) CMOS STATIC RAM |
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