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參數(shù)資料
| 型號： | M5M51016BTP-12VLL |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85 |
| 中文描述： | 1048576位（65536字由16位）的CMOS靜態(tài)RAM |
| 文件頁數(shù)： | 4/7頁 |
| 文件大?。?/td> | 75K |
| 代理商： | M5M51016BTP-12VLL |
MITSUBISHI LSIs
1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM
MITSUBISHI
ELECTRIC
M5M51016BTP,RT-12VL,
-12VLL
(2) READ CYCLE
(3) WRITE CYCLE
Symbol
Parameter
t
CR
t
a(A)
Read cycle time
Address access time
Byte control 1 access time
Byte control 2 access time
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
CW
t
w(W)
t
su(A)
t
su(A-WH)
t
en(OE)
t
su(BC1)
t
su(BC2 )
t
su(CS)
t
su(D)
t
h(D)
t
rec(W)
t
dis(W)
t
dis(OE)
t
en(W)
Symbol
Parameter
Write cycle time
Write pulse width
Address set up time
Address set up time with respect to W
Byte control 1 setup time
Byte control 2 setup time
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Max
Typ
Min
120
85
Max
Typ
Min
120
Limits
t
a(BC1)
t
a(BC2)
t
a(CS)
t
a(OE)
t
dis(BC1)
t
dis(BC2)
t
dis(CS)
t
dis(OE)
t
en(BC1)
t
en(BC2)
t
en(CS)
t
en(OE)
t
v(A)
Limits
0
100
100
100
Data set up time
Data hold time
Write recovery time
Output disable time from W low
Output disable time from OE high
45
0
0
Chip select set up time
100
5
5
Output enable time from W high
Output enable time from OE low
Output enable access time
Output disable time after BC
1
high
Output disable time after BC
2
high
Output disable time after CS low
Output disable time after OE high
Output enable time after BC
1
low
Output enable time after BC
2
low
Chip select access time
Output enable time after CS high
Output enable time after OE low
Data valid time after address
60
40
40
40
40
120
120
120
120
10
5
10
10
10
40
40
AC ELECTRICAL CHARACTERISTICS
(Ta = 0 ~ 70 , V
CC
= 2.7V ~ 3.6V, unless otherwise noted )
(1) MEASUREMENT CONDITIONS
Input pulse level
Input rise and fall time
Reference level
Output loads
............................
Transition is measured +
state voltage. ( for t
en
, t
dis
)
Fig.1 Output load
C
( Including scope
and JIG )
DQ
V
IH
= 2.2V, V
IL
= 0.4V
5ns
V
OH
= 1.5V, V
OL
= 1.5V
Fig.1,C
L
= 30pF
C
L
= 5pF ( for t
en
, t
dis
)
......................
..............
........................
M5M51016B
-12VL,-12VLL
M5M51016B
-12VL,-12VLL
4
1TTL
C
o
相關PDF資料 |
PDF描述 |
|---|---|
| M5M51016BTP-12VLL-I | Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85 |
| M5M51016BTP-12VL-I | 1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| M5M51016RT-12VL-I | 1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| M5M51016RT-70L-I | 1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| M5M51016RT-70LL-I | 1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M5M51016BTP-12VLL-I | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| M5M51016BTP-70L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| M5M51016BTP-70L-I | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| M5M51016BTP-70LL-I | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| M5M51016RT-10L-I | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
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