參數(shù)資料
型號: M5M4V64S20ATP-8A
廠商: Mitsubishi Electric Corporation
英文描述: 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
中文描述: 64M號(4銀行甲4194304字× 4位)同步DRAM
文件頁數(shù): 24/48頁
文件大?。?/td> 1097K
代理商: M5M4V64S20ATP-8A
M5M4V64S20ATP-8, -10, -12
Jan'97
Preliminary
MITSUBISHI LSIs
64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
MITSUBISHI ELECTRIC
SDRAM (Rev.0.2)
CLK SUSPEND
CKE controls the internal CLK at the following cycle. Figure below shows how CKE works. By negating
CKE, the next internal CLK is suspended. The purpose of CLK suspend is power down, output suspend or
input suspend. CKE is a synchronous input except during the self-refresh mode. CLK suspend can be per-
formed either when the banks are active or idle. A command at the suspended cycle is ignored.
Power Down by CKE
CLK
Command
PRE
CKE
Command
CKE
ACT
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
Standby Power Down
Active Power Down
NOP
NOP
ext.CLK
CKE
int.CLK
DQ Suspend by CKE
CLK
Command
DQ
Write
D0
CKE
READ
Q0
Q1
Q2
Q3
D1
D2
D3
24
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M5M4V64S20ATP-8L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S30ATP-10 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-10L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-12 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM