參數(shù)資料
型號(hào): M58LW032D90N6T
廠商: 意法半導(dǎo)體
英文描述: 32 Mbit 4Mb x8, 2Mb x16, Uniform Block 3V Supply Flash Memory
中文描述: 32兆位4Mb的× 8,功能的2Mb x16插槽,統(tǒng)一座3V電源快閃記憶體
文件頁數(shù): 27/51頁
文件大小: 748K
代理商: M58LW032D90N6T
27/51
M58LW032D
Figure 9. Bus Read AC Waveforms
Note: 1. V
IH
= Device Disabled (first edge of E0, E1 or E2), V
IL
= Device Enabled (first edge of E0, E1 or E2). Refer to Table 2 for more
details.
2. BYTE can be Low or High.
Table 15. Bus Read AC Characteristics.
Symbol
Parameter
Test Condition
M58LW032D
Unit
90
110
t
AVAV
Address Valid to Address Valid
E = V
IL
, G = V
IL
Min
90
110
ns
t
AVQV
Address Valid to Output Valid
E = V
IL
, G = V
IL
Max
90
110
ns
t
AXQX
Address Transition to Output Transition
E = V
IL
, G = V
IL
Min
0
0
ns
t
BLQV
Byte Low (or High) to Output Valid
E = V
IL
, G = V
IL
Max
1
1
μs
t
BLQZ
Byte Low (or High) to Output Hi-Z
E = V
IL
, G = V
IL
Max
1
1
μs
t
EHQX
Chip Enable High to Output Transition
G = V
IL
Min
0
0
ns
t
EHQZ
Chip Enable High to Output Hi-Z
G = V
IL
Max
25
25
ns
t
ELBL
Chip Enable Low to Byte Low (or High)
G = V
IL
Max
10
10
ns
t
ELQX
Chip Enable Low to Output Transition
G = V
IL
Min
0
0
ns
t
ELQV
Chip Enable Low to Output Valid
G = V
IL
Max
90
110
ns
t
GHQX
Output Enable High to Output Transition
E = V
IL
Min
0
0
ns
t
GHQZ
Output Enable High to Output Hi-Z
E = V
IL
Max
15
15
ns
t
GLQX
Output Enable Low to Output Transition
E = V
IL
Min
0
0
ns
t
GLQV
Output Enable Low to Output Valid
E = V
IL
Max
25
25
ns
AI06239b
E2, E1, E0
(1)
G
A0-A21
DQ0-DQ15
VALID
tAXQX
tELQX
tAVQV
tGLQV
tEHQZ
tGHQX
OUTPUT
tAVAV
tEHQX
tGHQZ
tGLQX
tELQV
BYTE
(2)
tELBL
tBLQV
tBLQZ
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M58LW032D90ZA1E 32 Mbit 4Mb x8, 2Mb x16, Uniform Block 3V Supply Flash Memory
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