參數(shù)資料
型號： M54HC691
廠商： 意法半導(dǎo)體
元件分類： 通用總線功能
英文描述： Binary Up/Down Counter/Register(二進(jìn)制計數(shù)器/寄存器)
中文描述： 二進(jìn)制加/減計數(shù)器/寄存器（二進(jìn)制計數(shù)器/寄存器）
文件頁數(shù)： 2/23頁
文件大?。?/td> 433K
代理商： M54HC691
counter’s outputsare stored inthe output register at
the positive edge of the register clock (RCK). If the
register clear input (RCLR) is held ”L” the register is
cleared (synchronously
to
register
clock
for
HC692/HC693
HC690/HC691). Allinputsareequipped withprotec-
tion circuits against static discharge and transient
excess voltage.
and
asynchronously
for
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
3 to 6
7, 14
15 to 18
1
SYMBOL
A to D
ENT, ENP
QA to QD
CCLR
NAME AND FUNCTION
Data Inputs
Enable Inputs
Data Outputs
Counter Clear (Active
LOW)
Counter Clock
Counter/ Register Select
Register Clear (Active
LOW)
Register Clock
Ripple Counter Output
Ground (0V)
Positive Supply Voltage
2
CCK
R/C
RCLR
11
8
9
RCK
RCO
GND
V
CC
19
10
20
IEC LOGIC SYMBOLS
HC691
HC692
HC693
HC690
M54/M74HC690/691/692/693
2/23
相關(guān)PDF資料
PDF描述
M54HC692 Decade Up/Down Counter/Register(十進(jìn)制j加/減計數(shù)器/寄存器)
M54HC693 Binary Up/Down Counter/Register(二進(jìn)制計數(shù)器/寄存器)
M54HC696 Decade Up/Down Counter/Register(十進(jìn)制加/減計數(shù)器/寄存器(三態(tài)))
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M54HC7643 Octal Bus Transceiver(八總線收發(fā)器)
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