參數(shù)資料
型號: M54HC4040C1R
廠商: 意法半導(dǎo)體
元件分類: 通用總線功能
英文描述: HC4020 14 STAGE BINARY COUNTER HC4040 12 STAGE BINARY COUNTER
中文描述: HC4020 14位的二進制計數(shù)器HC4040 12位的二進制計數(shù)器
文件頁數(shù): 1/13頁
文件大?。?/td> 265K
代理商: M54HC4040C1R
M54/74HC4020
M54/74HC4040
March 1993
HC4040 12 STAGE BINARY COUNTER
HC4020 14 STAGE BINARY COUNTER
B1R
(Plastic Package)
ORDER CODES :
M54HCXXXF1R
M74HCXXXB1R
M74HCXXXM1R
M74HCXXXC1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTION
(top view)
.
HIGH SPEED
f
MAX
= 73 MHz (TYP.) at V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) at T
A
= 25
o
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V to 6 V
.
PIN AND FUNCTION COMPATIBLE WITH
4020B/4040B
DESCRIPTION
The M54/74HC4020/HC4040
CMOS
14/12-STAGE
fabricated in silicon gate C
2
MOS technology. They
have the same high speed performance of LSTTL
combined with true CMOSlow consumption.
A clear input is used to reset the counter to the all
lowlevelstate.AhighlevelonCLEARaccomplishes
the reset function. A negative transition on the
CLOCKinput increments the counter by one.
For HC4020 twelve kind od divided output are
provided; 1st and 4th stage to 14th stage.
are high speed
BINARY
COUNTER
The maximum division available at last stage is
1/16384 x f
IN
atclock.
For HC4040each division stage has an output; the
final frequency is 1/4096 x f
IN
.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
HC4020
HC4040
HC4020
HC4040
1/13
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