參數(shù)資料
型號(hào): M54HC393
廠商: 意法半導(dǎo)體
英文描述: M54HC390F1R M74HC390M1R M74HC390B1R M74HC390C1R
中文描述: M54HC390F1R M74HC390M1R M74HC390B1R M74HC390C1R
文件頁數(shù): 1/12頁
文件大?。?/td> 256K
代理商: M54HC393
M54HC393
M74HC393
February 1993
DUAL BINARY COUNTER
B1R
(Plastic Package)
ORDER CODES :
M54HC393F1R
M74HC393B1R
M74HC393M1R
M74HC393C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
DESCRIPTION
.
HIGH SPEED
f
MAX
= 72 MHz (TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS393
The M54/74HC393 is a high speed CMOS DUAL
BINARY COUNTER fabricated in silicon gate
C2MOS technology. It has the same high speed
performance of LSTTL combined with true COMS
low powerconsumption.
This counter circuit contains independent ripple
carry counters and two 4-bit ripple carry binary
counters, which can be cascated to create a single
divideby 256 counter.
Each 4-bit counter isincremented on thehightolow
transition (negative edge) of the clock input,and
each has an independent clear input. When clear is
set to low all four bits of each counter are set to a
low level. This enables counttruncation and allows
the implementation
od divide by N counter
configurations.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
1/12
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