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參數(shù)資料
| 型號： | M54HC279F1R |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | QUAD S - R LATCH |
| 中文描述： | 四碼- R鎖存 |
| 文件頁數(shù)： | 2/10頁 |
| 文件大?。?/td> | 239K |
| 代理商： | M54HC279F1R |
PIN DESCRIPTION
PIN No
1, 5, 10. 14
2, 3, 6, 11,
12, 15
4, 7, 9, 13
8
16
SYMBOL
1R to 4R
1S1, 1S2,2S,
3S1,3S2,4S
1Q to 4Q
GND
V
CC
NAME AND FUNCTION
Reset Inputs (Active LOW)
Set Inputs (Active LOW)
Outputs
Ground (0V)
Positive Supply Voltage
IEC LOGIC SYMBOL
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
or I
GND
P
D
T
stg
T
L
AbsoluteMaximumRatingsarethose values beyond whichdamage tothedevicemayoccur. Functional operationunder theseconditionisnotimplied.
(*)500 mW:
65
o
C derate to300 mWby 10mW/
o
C: 65
o
C to85
o
C
Parameter
Value
-0.5 to +7
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
±
20
±
20
±
25
±
50
500 (*)
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
mW
o
C
o
C
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source Sink Current Per Output Pin
DC V
CC
or Ground Current
Power Dissipation
Storage Temperature
Lead Temperature (10 sec)
TRUTH TABLE
S #
H
L
H
L
R
H
H
L
L
Q
Q0
H
L
H
NOTE: Q0 = THE LEVEL OF Q BEFORETHEINDICRTEDINPUT
CONDITION WAS ESTABLISHED.
#
FOR LATCHESWITH DOUBLES INPUT:
H =BOTH S INPUTS HIGH
L = ONEOF BOTHINPUTS LOW
LOGIC DIAGRAM
M54/M74HC279
2/10
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