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參數(shù)資料
| 型號(hào)： | M54HC175F1R |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | QUAD D-TYPE FLIP-FLOP WITH CLEAR |
| 中文描述： | 四D型倒裝，沒有明確的浮點(diǎn)運(yùn)算 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 248K |
| 代理商： | M54HC175F1R |
M54HC175
M74HC175
October 1992
QUAD D-TYPE FLIP-FLOPWITH CLEAR
B1R
(Plastic Package)
ORDER CODES :
M54HC175F1R
M74HC175B1R
M74HC175M1R
M74HC175C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
DESCRIPTION
.
HIGH SPEED
t
PD
= 13 ns(TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS175
TheM54/74HC175is ahigh speedCMOSQUADD-
TYPE FLIP-FLOP WITH CLEAR fabricated in sili-
con gate CMOS technology. It has the same high
speed performance of LSTTL combined with true
CMOS low powerconsumption.
These four flip-flops are controlled by a clock input
(CLOCK) and a clear input (CLEAR). The informa-
tiondataapplied tothe Dinputs(1Dto4D)aretrans-
fered to theoutputs (1Q to4Q and 1Qto 4Q) on the
positive-going edge of the clock pulse. The reset
function is accomplished when the clear input is
taken low and all Q outputs are kept low regardless
of other input conditions. All inputs are equipped
with protection circuits against static discharge and
transient excess voltage.
1/11
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| M54HC175K | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RAD-HARD QUAD D-TYPE FLIP FLOP WITH CLEAR |
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