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參數(shù)資料
| 型號： | M54HC133F1R |
| 廠商： | 意法半導體 |
| 英文描述： | 13 INPUT NAND GATE |
| 中文描述： | 13輸入與非門 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 237K |
| 代理商： | M54HC133F1R |
M54HC133
M74HC133
October 1992
13 INPUT NAND GATE
B1R
(Plastic Package)
ORDER CODES :
M54HC133F1R
M74HC133B1R
M74HC133M1R
M74HC133C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
INPUT AND OUTPUT EQUIVALENT CIRCUIT
DESCRIPTION
The M54/74HC133 is a high speed CMOS 13-
INPUT NAND GATE fabricated in silicon gate
C
2
MOStechnology.Ithas thesame highspeedper-
formance of LSTTL combined with true CMOS low
powerconsumption.
The internal circuit is composed of 7 stages includ-
ing buffer output, which gives high noise immunity
and stable output. All inputs are equipped with pro-
tectioncircuitsagainst staticdischarge and transient
excess voltage.
.
HIGH SPEED
t
PD
= 13 ns(TYP.) at V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 1
μ
A(MAX.) at T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OutpuT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V to 6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS133
1/10
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| M54HC137 | 3 TO 8 LINE DECODER/LATCH INVERTING |
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| M54HC139 | M54HC138F1R M74HC138M1R M74HC138B1R M74HC138C1R |
相關代理商/技術參數(shù) |
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|---|---|
| M54HC137 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING) |
| M54HC137_04 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING) |
| M54HC137D | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING) |
| M54HC137D1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING) |
| M54HC137F1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3 TO 8 LINE DECODER/LATCH INVERTING |
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