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參數(shù)資料
| 型號(hào)： | M52D32162A-7.5TG |
| 廠商： | ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | 1M x 16Bit x 2Banks Synchronous DRAM |
| 中文描述： | 2M X 16 SYNCHRONOUS DRAM, 7 ns, PDSO54 |
| 封裝： | 0.400 INCH, LEAD FREE, TSOP2-54 |
| 文件頁(yè)數(shù)： | 18/30頁(yè) |
| 文件大小： | 784K |
| 代理商： | M52D32162A-7.5TG |
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ES MT
Page Write Cycle at Different Bank @Burst Length = 4
M52D32162A
Elite Semiconductor Memory Technology Inc.
Publication Date
:
May. 2007
Revision
:
1.4
18/30
*Note: 1.To interrupt burst write by Row precharge, DQM should be asserted to mask invalid input data.
2.To interrupt burst write by row precharge, both the write and the precharge banks must be the same.
CLOCK
CKE
CS
RAS
CAS
BA
ADDR
A10/AP
WE
DQM
HIGH
Row Active
(A-Bank)
Row Active
(B-Bank)
Write
(A-Bank)
Precharge
(Both Banks)
: Don't care
DQ
Write
(A-Bank)
Write
(B-Bank)
Write
(B-Bank)
DAa0
DAa1 DAa2
DAa3
DBb0
DBb1
DBb2 DBb3
DAc0
DAc1
DBd0
DBd1
RAa
RBb
RAa
CAa
RBb
CBb
CAc
CBd
*Note2
t
CDL
t
RDL
*Note1
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| M52D32321A-7.5BG | 512K x 32Bit x 2Banks Synchronous DRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M52D32162A-7BG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Mobile Synchronous DRAM |
| M52D32162A-7TG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Mobile Synchronous DRAM |
| M52D32321A | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 32Bit x 2Banks Mobile Synchronous DRAM |
| M52D32321A_09 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 32Bit x 2Banks Mobile Synchronous DRAM |
| M52D32321A-10BG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 32Bit x 2Banks Mobile Synchronous DRAM |
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