參數(shù)資料
型號(hào): M52757FP
廠商: Mitsubishi Electric Corporation
英文描述: WIDE BAND ANALOG SWITCH
中文描述: 寬頻帶模擬開關(guān)
文件頁(yè)數(shù): 1/5頁(yè)
文件大?。?/td> 229K
代理商: M52757FP
MITSUBISHI ICs (Monitor)
M52757FP
WIDE BAND ANALOG SWITCH
(
/ 5 )
DESCRIPTION
The M52757FP is a semiconductor integrated circuit for
the RGB interface. The device features switching signals
input from two types of image sources and outputting the
signals to the CRT display,etc. The frequency band of
video signals is 250MHz, acquiring high-resolution
images, and are optimum as an interface IC with high-
resolution CRT display and various new media.
It includes Sync-separator, Video-signal-detector, and
Sync-on G detector (SOG-DET.).
Frequency band width : R.G.B ...................250MHz
Input level : R.G.B...............................0.7Vp-p (Typ.)
Video signal-detector
Responsive frequency............................... ~50MHz
Input level............................................0.7Vpp (Typ.)
Detected level......................................150mV (Typ.)
(Measure bottom to DET.level)
Only the G channel is proveded with buffer video output.
It is possible to save the consumption current by
stopping current supply to Pin 2,4,6,20,24,30,33,35
because SOG-DET can be operated with only Vcc5
(Pin 15) as power save mode.
Include Sync Separation,Video signal detector, and
Sync-on G detector.
FEATURES
1
PIN CONFIGURATION (TOP VIEW)
Outline: 36P2R-D
Input1 (R)
Vcc1 (R)
Input1 (G)
Vcc1 (G)
Input1 (B)
Vcc1 (B)
Input2 (R)
GND1
Input2(G)
GND5
Input2 (B)
SyncDET1
SyncDET2
S-DETout
Vcc5
VideoDET-Hold
V-DETout
SWITCH
VCC2 (R)
OUTPUT (R)
GND2(R)
Vcc2(G)
OUTPUT(G)
GND2 (G)
Vcc2 (B)
OUTPUT(B)
CND2(B)
G Buffer out
Sync SEP in
Sync SEP out
Vcc3
V-DET in3
GND4
V-DET in2
Vcc4
V-DET in1
19
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
32
31
30
29
28
27
26
25
24
23
22
21
20
18
33
34
35
36
APPLICATION
Display monitor
RECOMMENDED OPERATING CONDITION
Suply voltage range
Rated voltage
4.75~5.5V
5.0V
OUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
G
B
R
G
Vcc1(G)
Vcc1(R)
Vcc(5V)
Vcc2(R)
16
17
18
30
29
28
27
26
25
24
23
22
21
20
19
Vcc3
OR
31
32
33
34
35
36
Vcc4
POWER
SAVE
V-DET in 1
BLOCK DIAGRAM
Sync
sepa
Vcc1(B)
INPUT1(R)
INPUT1(G)
INPUT1(B)
INPUT2(R)
INPUT2(G)
INPUT2(B)
Vcc5
SyncDET1
SyncDET2
VideoDET-Hold
V-DET out
SW GND : INPUT1
SW OPEN : INPUT2
Vcc2(G)
Vcc2(B)
OUTPUT(R)
OUTPUT(G)
OUTPUT(B)
V-DET in 2
V-DET in 3
Sync SEP out
Sync SEP in
(G Buffer out
相關(guān)PDF資料
PDF描述
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