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參數(shù)資料
| 型號： | M52693SP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | BURST LOCK CLOCK GENERATOR |
| 中文描述： | 爆破鎖時鐘發(fā)生器 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 166K |
| 代理商： | M52693SP |
BURST LOCK CLOCK GENERATOR
M52693SP
MITSUBISHI ICs (AV COMMON)
PIN CONFIGURATION (TOP VIEW)
Outline 30P4B
SUB CLAMP OUT
REFERENCE A/D+
SMALL LUMA IN
REFERENCE A/D-
SMALL CHROMA IN
GND 2
BURST GATE IN
VCA OUT
FREE RUN CONTROL
F
SC
OUT
INPUT SW CONTROL 1
4F
SC
OUT
INPUT SW CONTROL 2
SUPER SWITH
SYNC SEP. OUT
PIP CVBS OUT
GND
MAIN CLAMP CAP.
VIDEO IN 1
V
CC
2
V
CC
VIDEO IN 2
APC FILTER
VCXO OUT
ACC FILTER
VCXO IN
VCA CAP.
MAIN CHROMA IN
MAIN VIDEO OUT
SYNC SEP. IN
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DESCRIPTION
The M52693SP is a semiconductor integrated circuit developed for
analog signal processing of a picture-in-picture system, consisting
of a sync separator, an ACC, a burst lock clock generator circuit,
an analog switch and a clamp circuit, etc. It is also available on
digital video signal systems other than the above.
FEATURES
Low power dissipation of supply voltage 5.0V and circuit current
32mA (Typ.)
Built-in 4fsc burst lock clock generator circuit required for digital
video signal processing
Small picture chroma level following main picture burst level
Main picture pedestal level matching small picture pedestal level
Built-in reference voltage source for A/D converter
APPLICATION
TV, VCR
RECOMMENDED OPERATING CONDITION
Supply voltage range......................................................4.7 to 5.3V
Rated supply voltage.................................................................5.0V
bgp
BLOCK DIAGRAM
CHFOMA
VCA
FREE RUN
CTRL.
BGP
GEN.
SW
CTRL.
SW
CTRL.
SW
CTRL.
4fsc
fsc
REF.
MAIN
CLAMP
CLAMP
CLAMP
PHASE
COMP.
1/4
DEV.
VCXO
LEVEL
DET.
ACC
SYNC
SEPARATOR
20
19
17
16
18
30
29
27
26
24
28
21
22
25
23
10
9
7
6
4
8
1
2
5
3
14
11
12
15
13
S1
S2
S3
bgp
bgp
S1
S2
S3
MIX.
SUB
CLAMP
OUT
SMALL
LUMA
IN
CHROMA
IN
BURST
GATE
IN
VCA
OUT
FREE
RUN
CONTROL
F
OUT
INPUT
SW
CONTROL 1
INPUT
SW
CONTROL 2
SYNC
SEP.
OUT
4F
SC
OUT
SUPER
SWITH
PIP
CVBS
OUT
GND
MAIN
CLAMP
CAP.
VIDEO
IN 1
V
CC
2
V
CC
VIDEO
IN 2
VCXO
OUT
ACC
FILTER
VCXO
IN
MAIN
CHROMA
IN
SYNC
SEP.
IN
VCA
CAP.
MAIN
VIDEO
OUT
APC
FILTER
GND 2
REFERENCE
A/D+
REFERENSMALL
A/D-
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|---|---|
| M52721 | WIDEBAND VIDEO PREAMPLIFIER WITH OSD MIX |
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| M52722SP | 3-CHANNEL VIDEO PREAMPLIFIER PROVIDED WITH OSD MIX AND RETRACE LINE BLK FOR HIGH-RESOLUTION |
| M52738P | 3-CHANNEL VIDEO PREAMPLIFIER WITH OSD MIXING, RETRACE BLANKING |
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參數(shù)描述 |
|---|---|
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| M5270L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:LOW SATURATION OUTPUT TYPE CURRENT DRIVER |
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