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參數(shù)資料
| 型號： | M50LPW041 |
| 廠商： | 意法半導體 |
| 英文描述： | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| 中文描述： | 4兆位512KB的× 8，統(tǒng)一座3V電源低引腳數(shù)快閃記憶體 |
| 文件頁數(shù)： | 3/37頁 |
| 文件大?。?/td> | 268K |
| 代理商： | M50LPW041 |
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M50LPW041
Figure 4. TSOP Connections
AI06872
A1
A2
A0
DQ0
A7
A6
A5
A4
A3
A9
A8
W
G
RB
VSS
VCC
DQ7
DQ6
DQ5
DQ4
VCC
DQ1
DQ2
DQ3
A
A
ID1
ID2
ID3
LAD1
LAD0
ID0
LAD2
GPI3
GPI2
GPI1
TBL
GPI0
WP
NC
VCC
LFRAME
INIT
RFU
NC
NC
NC
IC (VIL)
RFU
RFU
GPI4
NC
CLK
VCC
NC
VSS
VSS
RFU
RFU
LAD3
VCC
RP
NC
NC
VPP
M50LPW041
10
11
1
20
21
30
31
40
VSS
NC
NC
A10
NC
NC
NC
IC (VIH)
NC
NC
RC
VCC
RP
VPP
NC
VSS
VSS
Table 1. Signal Names (LPC Interface) Memory
LAD0-LAD3
Input/Output Communications
LFRAME
Input Communication Frame
ID0-ID3
Identification Inputs
GPI0-GPI4
General Purpose Inputs
IC
Interface Configuration
RP
Interface Reset
INIT
CPU Reset
CLK
Clock
TBL
Top Block Lock
WP
Write Protect
RFU
Reserved for Future Use. Leave
disconnected or set at V
IL
or V
IH
.
V
CC
Supply Voltage
V
PP
Optional Supply Voltage for Fast
Erase Operations
V
SS
Ground
NC
Not Connected Internally
designed to remove the need for the ISA bus in
current PC Chipsets; the M50LPW041 acts as the
PC BIOS on the Low Pin Count bus for these PC
Chipsets.
The secondary interface, the Address/Address
Multiplexed (or A/A Mux) Interface, is designed to
be compatible with current Flash Programmers for
production line programming prior to fitting to a PC
Motherboard.
The memory is offered in a PLCC32 or TSOP40
(10mm x 20mm) package and is supplied with all
the bits erased (set to 1).
System Memory Mapping
The LPC address sequence is 32 bits long. The
M50LPW041 responds to addresses mapped to
the top of the 4 GByte memory space, from
FFFF FFFFh. Address bits A31-A24 must be set
to 1. A23 is set to 1 for array access, and to 0 for
register access.
The M50LPW041 also responds to addresses
mapped to the bottom of the 4 GByte memory
space, from 0000 0000h. Address bits A31-A24
must be set to 0. A23 is set to 0 for array access,
and to 1 for register access.
For A22-A19, see Table 2. A18-A0 are for array
addresses.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M50LPW041K | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW041K1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW041N | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW041N1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW080 | 制造商:STMicroelectronics 功能描述: |
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