參數(shù)資料
型號: M50FW016N1
廠商: 意法半導(dǎo)體
英文描述: 16 Mbit 2Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory
中文描述: 16兆位的2Mb × 8,統(tǒng)一座3V電源閃存固件集線器
文件頁數(shù): 5/45頁
文件大?。?/td> 673K
代理商: M50FW016N1
13/45
M50FW016
Table 4. FWH Bus Read Field Definitions
Note: 1. Clock Cycle Number = (2MSIZE –1)* 2+18
2. Clock Cycle Number = (2MSIZE –1)* 2+19
Figure 5. FWH Bus Read Waveforms (Single Byte Read)
Clock
Cycle
Number
Clock
Cycle
Count
Field
FWH0-
FWH3
Memory
I/O
Description
1
START
1101b
I
On the rising edge of CLK with FWH4 Low, the contents of
FWH0-FWH3 indicate the start of a FWH Read cycle.
2
1
IDSEL
XXXX
I
Indicates which FWH Flash Memory is selected. The value
on FWH0-FWH3 is compared to the IDSEL strapping on the
FWH Flash Memory pins to select which FWH Flash
Memory is being addressed.
3-9
7
ADDR
XXXX
I
A 28-bit address phase is transferred starting with the most
significant nibble first. For the multi-byte read operation, the
least significant bits (MSIZE of them) are treated as Don't
Care, and the read operation is started with each of these
bits reset to 0.
10
1
MSIZE
0XXXb
I
This one clock cycle is driven by the host to determine how
many bytes will be transferred. M50FW016 will support:
single byte transfer (0000b), 4-byte transfer (0010b), 16-byte
transfer (0100b) and 128-byte transfer (0111b).
11
1
TAR
1111b
I
The host drives FWH0-FWH3 to 1111b to indicate a
turnaround cycle.
12
1
TAR
1111b
(float)
O
The FWH Flash Memory takes control of FWH0-FWH3
during this cycle.
13-14
2
WSYNC
0101b
O
The FWH Flash Memory drives FWH0-FWH3 to 0101b
(short wait-sync) for two clock cycles, indicating that the data
is not yet available. Two wait-states are always included.
15
1
RSYNC
0000b
O
The FWH Flash Memory drives FWH0-FWH3 to 0000b,
indicating that data will be available during the next clock
cycle.
16-17
2
DATA
XXXX
O
Data transfer is two CLK cycles, starting with the least
significant nibble.
If multi-byte read operation is
enabled, repeat cycle 16-17 n times, where n = 2MSIZE –1
Note 1
1
TAR
1111b
O
The FWH Flash Memory drives FWH0-FWH3 to 1111b to
indicate a turnaround cycle.
Note 2
1
TAR
1111b
(float)
N/A
The FWH Flash Memory floats its outputs, the host takes
control of FWH0-FWH3.
AI03437
CLK
FWH4
FWH0-FWH3
Number of
clock cycles
START
IDSEL
ADDR
MSIZE
TAR
SYNC
DATA
TAR
11712322
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