參數(shù)資料
型號: M5-384/192-7AC
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: Fifth Generation MACH Architecture
中文描述: EE PLD, 7.5 ns, PBGA256
封裝: BGA-256
文件頁數(shù): 5/47頁
文件大?。?/td> 1145K
代理商: M5-384/192-7AC
MACH 5 Family
13
MACH 5 PAL BLOCK
0
4
8
1216
2024
28
32
I/O
Cell
I/O
Switch
Matrix
Output Enable
CLK
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
Macro
cell
Macro
cell
Macro
cell
Macro
cell
Macro
cell
Macro
cell
Macro
cell
Macro
cell
32
Macro
cell
Macro
cell
Macro
cell
Macro
cell
Macro
cell
Macro
cell
Macro
cell
Macro
cell
7
0
Logic
Allocator
63
C
0
C
1
C
2
C
3
C
4
C
5
C
6
C
7
C
8
C
9
C
10
C
11
C
12
C
13
C
14
C
15
M
3
M
6
M
5
M
4
M
2
M
1
M
0
M
9
M
8
M
7
M
10
M
11
M
12
M
13
M
14
M
15
I/O
Control
Generator
16
4
63
36
40
44
48
52
56
60
0
4
8
1216
2024
28
32
63
36
40
44
48
52
56
60
20446G-015
相關PDF資料
PDF描述
M5-384/192-7AI Fifth Generation MACH Architecture
M5-512/120-20HI Fifth Generation MACH Architecture
M5LV-384/192-10AC Fifth Generation MACH Architecture
M5LV-384/192-10AI Fifth Generation MACH Architecture
M5LV-384/192-12AC Fifth Generation MACH Architecture
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