參數(shù)資料
型號: M5-256/68-15VI/1
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 41/42頁
文件大?。?/td> 0K
描述: IC CPLD ISP 256MC 68IO 100TQFP
標準包裝: 90
系列: MACH® 5
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 15.0ns
電壓電源 - 內(nèi)部: 4.5 V ~ 5.5 V
宏單元數(shù): 256
輸入/輸出數(shù): 68
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應商設備封裝: 100-TQFP(14x14)
包裝: 托盤
8
MACH 5 Family
OE Generator
There is one output enable (OE) generator per PAL block that generates two product-term driven output
enables. Each I/O cell is simply an output buffer. Each I/O cell within the PAL block can choose to be
permanently enabled, permanently disabled, or choose one of the two product term output enables per PAL
block (Figure 6).
Output Enable
Generator
VCC
Internal Feedback
External Feedback
20446G-006
Figure 6. Output Enable Generator and I/O Cell
Select
devices
have
been
discontinued.
See
Ordering
Information
section
for
product
status.
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