參數(shù)資料
型號(hào)： M4A5-96/48-7VNC
廠商： Lattice Semiconductor Corporation
文件頁(yè)數(shù)： 62/62頁(yè)
文件大小： 0K
描述： IC CPLD 96MACRO 100TQFP
標(biāo)準(zhǔn)包裝： 90
系列： ispMACH® 4A
可編程類(lèi)型： 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1)： 7.5ns
電壓電源 - 內(nèi)部： 4.75 V ~ 5.25 V
宏單元數(shù)： 64
輸入/輸出數(shù)： 48
工作溫度： 0°C ~ 70°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-TQFP（14x14）
包裝： 托盤(pán)
ispMACH 4A Family
9
Note that the configuration of the logic allocator has absolutely no impact on the speed of the signal. All
configurations have the same delay. This means that designers do not have to decide between optimizing
resources or speed; both can be optimized.
If not used in the cluster, the extra product term can act in conjunction with the basic cluster to provide
XOR logic for such functions as data comparison, or it can work with the D-,T-type flip-flop to provide
for J-K, and S-R register operation. In addition, if the basic cluster is routed to another macrocell, the extra
product term is still available for logic. In this case, the first XOR input will be a logic 0. This circuit has the
flexibility to route product terms elsewhere without giving up the use of the macrocell.
Product term clusters do not “wrap” around a PAL block. This means that the macrocells at the ends of
the block have fewer product terms available.
0
17466G-007
Figure 3. Logic Allocator Congurations: Synchronous Mode
a. Basic cluster with XOR
b. Extended cluster, active high
c. Extended cluster, active low
d. Basic cluster routed away;
single-product-term, active high
e. Extended cluster routed away
0
17466G-008
Figure 4. Logic Allocator Congurations: Asynchronous Mode
b. Extended cluster, active high
c. Extended cluster, active low
e. Extended cluster routed away
d. Basic cluster routed away;
single-product-term, active high
a. Basic cluster with XOR
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