參數(shù)資料
型號: M491B1
廠商: 意法半導(dǎo)體
英文描述: SINGLE-CHIP VOLTAGE SYNTHESIS TUNING SYSTEM WITH 1 ANALOG CONTROL
中文描述: 單片電壓合成調(diào)諧系統(tǒng)的1個模擬控制
文件頁數(shù): 13/16頁
文件大?。?/td> 135K
代理商: M491B1
The volume is automatically muted for 3 seconds
after the key pressure and isimmediately restored
at the release of the key.
Tuningspeeds are as follows:
- FINE TUNING UP/DOWN
See descriptionof pin 4.
- DIGITALAFT ON
See descriptionof pin 17.
- VOLUMEUP/DOWN
See descriptionof pin 15.
- MAINSON/OFF
See descriptionof pins25 and 26.
Band
Number of Tuning Steps Second
Time 0
After 1 s
64
64
16
16
32
After 2 s
256
256
64
64
After 3 s
512
512
128
128
VHF I
VHF III
UHF
CATV
128
128
32
4
STORECOMMANDS
2 modes of operationsare available.
a)store
b)memory addressing
In order to protect the memory, the store function
is internallydisabled after one store cycle.
It is enabled after a program change or a tuning
operation (it is not disabled by the Digital AFT
control).
a) STORE. The tuning information (Tuning D/A,
Fine tuningD/Aand band)is stored in apreviously
selected memory address when this command is
issued.
b) MEMORY ADDRESSING. The tuning informa-
tion can alsobestoredwith this command followed
by the memory position selection.
When this command is accepted all the memory
LEDs are blanked.
Selectionofthe memory positioninitiatesthe store
operationsand restores the display.
MUTE ON/OFF
See descriptionof pin 15.
PIN 25 : MAINS ON OPTIONINPUT
If connected to V
SS
(GND) the Mains output is
automaticallyswitchedon when V
DD
isappliedand
memory 1 is read.
If it is connectedtoV
DD
thecircuit goes in standby
condition.
PIN 26 : MAINS ON/OFF OUTPUT
Switch on of the set is controlledby the Mains on
command issued for more than 0.3 s. The output
transistoris setin theoff conditionto drive through
an integrated pull-up resistor, an external NPN
transistor.
+5V
4
Figure 15
At each Mains on command a memory read out
occurs.AV
PP
(+25 V)isrequiredforthisoperation,
a 1 second delay starts when the mains output is
switched off. For a correct reading of the memory
the V
PP
supplyvoltage must reach the value of 25
V within 1 secondafter a Mains on command.
In case of automaticswitch on at poweron caused
bypin 25 at GND, the total delay is of 1.13second
(0.13s for V
DD
power on reset plus 1 second for
mains on).
The Mains on/off command,if repeated,willswitch
the output on (setoff).
Thelast addressinformation is preserved untilV
DD
is present.
Next Mains on command will switch the set at the
previously selected memory address and a read
operationwill be performed.
PINS27-28-29-30-33-34-35-36:
MEMORY ADDRESS OUTPUT
Thesepins operateasoutput onlyfordisplayofthe
selected memory location. Max drive capability is
of15 mA/1.2V with theexception ofpin 36 that is
of30 mA/1.5 V.
Direct memory selectionis onlypossiblebyremote
control.Alocalmemoryup/downcommandisavail-
able in case of emergency.
Pin32 mustbe grounded.
If pin 31 is grounded, the memoryposition 9 to 16
are skipped in case of memory up/down com-
mands.
For normal operation pin 31 can be left open or,
better,connectedto V
DD
.
PINS31-32
Seedescriptionof pins 27 to 30 and 33 to 36.
PINS37-38-39-40: BAND INPUT/OUTPUT
Theseoutputsareprovidedto selectupto 4 bands
viaexternal PNPs.
If one or more bands have to be skipped, the
correspondingoutputshaveto beshort-circuitedto
V
SS
.
M491B
13/16
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