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參數(shù)資料
| 型號(hào)： | M48Z02 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 16 Kbit 2Kb x 8 ZEROPOWER SRAM |
| 中文描述： | 16千位2KB的SRAM的× 8 ZEROPOWER |
| 文件頁(yè)數(shù)： | 4/12頁(yè) |
| 文件大?。?/td> | 85K |
| 代理商： | M48Z02 |
Symbol
Parameter
Test Condition
Min
Max
Unit
I
LI (1)
Input Leakage Current
0V
≤
V
IN
≤
V
CC
±
1
μ
A
I
LO (1)
Output Leakage Current
0V
≤
V
OUT
≤
V
CC
±
5
μ
A
I
CC
Supply Current
Outputs open
80
mA
I
CC1
Supply Current (Standby) TTL
E = V
IH
3
mA
I
CC2
Supply Current (Standby) CMOS
E = V
CC
– 0.2V
3
mA
V
IL
(2)
Input Low Voltage
–0.3
0.8
V
V
IH
Input High Voltage
2.2
V
CC
+ 0.3
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High Voltage
I
OH
= –1mA
2.4
V
Notes:
1. Outputs Deselected.
2. Negative spikes of –1V allowed for up to 10ns once per cycle.
Table 6. DC Characteristics
(T
A
= 0 to 70
°
C or –40 to 85
°
C; V
CC
= 4.75V to 5.5V or 4.5V to 5.5V)
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
C
IO (2)
Input Capacitance
V
IN
= 0V
10
pF
Input / Output Capacitance
V
OUT
= 0V
10
pF
Notes:
1. Effective capacitance measured with power supply at 5V.
2. Outputs deselected
Table 5. Capacitance
(1)
(T
A
= 25
°
C)
Symbol
Parameter
Min
Typ
Max
Unit
V
PFD
Power-fail Deselect Voltage (M48Z02)
4.5
4.6
4.75
V
V
PFD
Power-fail Deselect Voltage (M48Z12)
4.2
4.3
4.5
V
V
SO
Battery Back-up Switchover Voltage
3.0
V
t
DR
Expected Data Retention Time
10
YEARS
Note:
1. All voltages referenced to V
SS
.
Table 7. Power Down/Up Trip Points DC Characteristics
(1)
(T
A
= 0 to 70
°
C or –40 to 85
°
C)
4/12
M48Z02, M48Z12
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| M48Z02_07 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5V, 16Kbit (2Kb x 8) ZEROPOWER SRAM |
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