參數(shù)資料
型號: M48T59Y-70MH1E
廠商: STMICROELECTRONICS
元件分類: 時鐘/數(shù)據(jù)恢復(fù)及定時提取
英文描述: 0 TIMER(S), REAL TIME CLOCK, PDSO28
封裝: 0.330 INCH, LEAD FREE, PLASTIC, SOH-28
文件頁數(shù): 9/32頁
文件大?。?/td> 373K
代理商: M48T59Y-70MH1E
Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
M48T59, M48T59Y, M48T59V
Clock operations
Figure 11.
Back-up mode alarm waveforms
3.6
Watchdog timer
The watchdog timer can be used to detect an out-of-control microprocessor. The user
programs the watchdog timer by setting the desired amount of time-out into the eight-bit
Watchdog Register (Address 1FF7h). The five bits (BMB4-BMB0) that store a binary
multiplier and the two lower order bits (RB1-RB0) select the resolution, where 00 = 1/16
second, 01 = 1/4 second, 10 = 1 second, and 11 = 4 seconds. The amount of time-out is
then determined to be the multiplication of the five-bit multiplier value with the resolution.
(For example: writing 00001110 in the Watchdog Register = 3 x 1 or 3 seconds).
Note:
Accuracy of timer is within ± the selected resolution.
If the processor does not reset the timer within the specified period, the M48T59/Y/V sets
the WDF (Watchdog Flag) and generates a watchdog interrupt or a microprocessor reset.
WDF is reset by reading the Flags Register (Address 1FF0h).
Note:
User must transition address (or toggle chip enable) to see Flag Bit change.
The most significant bit of the Watchdog Register is the Watchdog Steering Bit. When set to
a '0,' the watchdog will activate the IRQ/FT pin when timed-out. When WDS is set to a '1,'
the watchdog will output a negative pulse on the RST pin for a duration of trec. The
Watchdog Register, the FT Bit, and the AFE and ABE Bits will reset to a '0' at the end of a
watchdog time-out when the WDS bit is set to a '1.'
The watchdog timer resets when the microprocessor performs a re-write of the Watchdog
Register. The time-out period then starts over. The watchdog timer is disabled by writing a
value of 00000000 to the eight bits in the Watchdog Register.
The watchdog function is automatically disabled upon power-down and the Watchdog
Register is cleared. If the watchdog function is set to output to the IRQ/FT pin and the
frequency test function is activated, the watchdog or alarm function prevails and the
frequency test function is denied.
AI03254B
VCC
IRQ/FT
trec
VPFD (max)
VPFD (min)
ABE, AFE bit in Interrupt Register
AF bit in Flags Register
HIGH-Z
VSO
HIGH-Z
相關(guān)PDF資料
PDF描述
M48T59Y-70MH1 0 TIMER(S), REAL TIME CLOCK, PDSO28
M48T59V-70MH6 0 TIMER(S), REAL TIME CLOCK, PDSO28
M48T59V-70MH6E REAL TIME CLOCK, PDSO28
M48T59V-70MH6TR 0 TIMER(S), REAL TIME CLOCK, PDSO28
M48T59Y-70MH6F REAL TIME CLOCK, PDSO28
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