參數(shù)資料
型號: M48T59Y-70MH1
廠商: 意法半導(dǎo)體
英文描述: 64 Kbit 8Kb x8 TIMEKEEPER SRAM
中文描述: 64千位8KB的x8 SRAM的計時器
文件頁數(shù): 11/17頁
文件大?。?/td> 135K
代理商: M48T59Y-70MH1
Stopping and Starting the Oscillator
The oscillator may be stopped at any time. If the
device is going to spend a significant amount of
time on the shelf, the oscillator can be turned off to
minimize current drain on the battery. The STOP
bit is the MSB of the seconds register. Setting it to
a ’1’ stops the oscillator. The M48T58/58Y is
shipped from STMicroelectronics with the STOP bit
set to a ’1’. When reset to a ’0’, the M48T58
oscillator starts within one second.
Calibrating the Clock
The M48T58/58Y is driven by a quartz controlled
oscillator with a nominal frequency of 32,768 Hz.
The devices are tested not to exceed 35 ppm (parts
per million) oscillator frequency error at 25
°
C,
which equates to about
±
1.53 minutes per month.
With the calibration bits properly set, the accuracy
of each M48T58 improves to better than
±
4 ppm at
25
°
C.
The oscillation rate of any crystal changes with
temperature (see Figure 10). Most clock chips com-
pensate for crystal frequency and temperature shift
error with cumbersome trim capacitors. The
M48T58/58Y design, however, employs periodic
counter correction. The calibration circuit adds or
subtracts counts from the oscillator divider circuit
at the divide by 256 stage, as shown in Figure 9.
The number of times pulses are blanked (sub-
AI02124
-80
-60
-100
-40
-20
0
20
0
5
10
15
20
25
30
35
40
45
50
55
60
65
70
F= -0.038
F
(T - T
0
)
2
±
10%
ppm
C
2
T
0
= 25
°
C
ppm
°
C
Figure 10. Crystal Accuracy Across Temperature
tracted, negative calibration) or split (added, posi-
tive calibration) depends upon the value loaded
into the five Calibration bits found in the Control
Register. Adding counts speeds the clock up, sub-
tracting counts slows the clock down.
The Calibration byte occupies the five lower order
bits (D4-D0) in the Control register (1FF8h). These
bits can be set to represent any value between 0
and 31 in binary form. Bit D5 is a Sign bit; ’1’
indicates positive calibration, ’0’ indicates negative
calibration. Calibration occurs within a 64 minute
cycle. The first 62 minutes in the cycle may, once
per minute, have one second either shortened by
128 or lengthened by 256 oscillator cycles. If a
binary ’1’ is loaded into the register, only the first 2
minutes in the 64 minute cycle will be modified; if a
binary 6 is loaded, the first 12 will be affected, and
so on.
Therefore, each calibration step has the effect of
adding 512 or subtracting 256 oscillator cycles for
every 125,829,120 actual oscillator cycles; that is
+4.068 or -2.034 ppm of adjustment per calibration
step in the calibration register. Assuming that the
oscillator is in fact running at exactly 32,768 Hz,
each of the 31 increments in the Calibration byte
would represent +10.7 or - 5.35 seconds per month
which corresponds to a total range of +5.5 or - 2.75
minutes per month.
11/17
M48T58, M48T58Y
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