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參數(shù)資料
| 型號(hào)： | M48T59V-70MH1E |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封裝： | 0.330 INCH, LEAD FREE, PLASTIC, SOH-28 |
| 文件頁(yè)數(shù)： | 11/32頁(yè) |
| 文件大?。?/td> | 373K |
| 代理商： | M48T59V-70MH1E |
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Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
M48T59, M48T59Y, M48T59V
Clock operations
3.10
Century bit
Bit D5 and D4 of Clock Register 1FFCh contain the CENTURY ENABLE Bit (CEB) and the
CENTURY Bit (CB). Setting CEB to a '1' will cause CB to toggle, either from a '0' to '1' or
from '1' to '0' at the turn of the century (depending upon its initial state). If CEB is set to a '0,'
CB will not toggle.
Note:
The WRITE Bit must be set in order to write to the CENTURY Bit.
3.11
Initial power-on defaults
Upon application of power to the device, the following register bits are set to a '0' state:
WDS; BMB0-BMB4; RB0-RB1; AFE; ABE; W; R; FT (see Table 7).
Table 7.
Default values
3.12
VCC noise and negative going transients
ICC transients, including those produced by output switching, can produce voltage
fluctuations, resulting in spikes on the VCC bus. These transients can be reduced if
capacitors are used to store energy which stabilizes the VCC bus. The energy stored in the
bypass capacitors will be released as low going spikes are generated or energy will be
absorbed when overshoots occur. A ceramic bypass capacitor value of 0.1 F (as shown in
Figure 12 on page 20) is recommended in order to provide the needed filtering.
In addition to transients that are caused by normal SRAM operation, power cycling can
generate negative voltage spikes on VCC that drive it to values below VSS by as much as
one volt. These negative spikes can cause data corruption in the SRAM while in battery
backup mode. To protect from these voltage spikes, it is recommended to connect a
schottky diode from VCC to VSS (cathode connected to VCC, anode to VSS). Schottky diode
1N5817 is recommended for through hole and MBRS120T3 is recommended for surface
mount.
Condition
W
R
FT
AFE
ABE
Watchdog
register(1)
1.
WDS, BMB0-BMB4, RBO, RB1.
Initial power-up
(Battery attach for SNAPHAT)(2)
2.
State of other control bits undefined.
00
000
0
Subsequent power-up / RESET(3)
3.
State of other control bits remains unchanged.
00
000
0
Power-down(4)
4.
Assuming these bits set to '1' prior to power-down.
00
011
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M48T59V-70PC1 | 0 TIMER(S), REAL TIME CLOCK, PDIP28 |
| M48T59Y-70PC1DS | 0 TIMER(S), REAL TIME CLOCK, PDIP28 |
| M48T59V-70MH1TR | 0 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M48T59V-70MH1 | 0 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M48T59Y-70MH1E | 0 TIMER(S), REAL TIME CLOCK, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48T59V-70MH1F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.3 V, 64 Kbit (8 Kbit x 8) TIMEKEEPER? SRAM |
| M48T59V-70MH1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Kbit 8Kb x8 TIMEKEEPER SRAM |
| M48T59V-70MH6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Kbit 8Kb x8 TIMEKEEPER SRAM |
| M48T59V-70MH6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Kbit 8Kb x8 TIMEKEEPER SRAM |
| M48T59V-70PC1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.3 V, 64 Kbit (8 Kbit x 8) TIMEKEEPER? SRAM |
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