參數(shù)資料
型號(hào)： M48T58-70PC1
廠商： STMICROELECTRONICS
元件分類： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： 0 TIMER(S), REAL TIME CLOCK, PDIP28
封裝： 0.600 INCH, CAPHAT, PLASTIC, DIP-28
文件頁(yè)數(shù)： 32/33頁(yè)
文件大小： 511K
代理商： M48T58-70PC1
Operation modes
M48T58, M48T58Y
Doc ID 2412 Rev 7
2
Operation modes
As Figure 4 on page 7 shows, the static memory array and the quartz controlled clock
oscillator of the M48T58/Y are integrated on one silicon chip. The two circuits are
interconnected at the upper eight memory locations to provide user accessible
BYTEWIDE clock information in the bytes with addresses 1FF8h-1FFFh. The clock
locations contain the century, year, month, date, day, hour, minute, and second in 24 hour
BCD format (except for the century). Corrections for 28, 29 (leap year - valid until 2100), 30,
and 31 day months are made automatically. Byte 1FF8h is the clock control register. This
byte controls user access to the clock information and also stores the clock calibration
setting.
The eight clock bytes are not the actual clock counters themselves; they are memory
locations consisting of BiPORT READ/write memory cells. The M48T58/Y includes a
clock control circuit which updates the clock bytes with current information once per second.
The information can be accessed by the user in the same manner as any other location in
the static memory array.
The M48T58/Y also has its own power-fail detect circuit. The control circuitry constantly
monitors the single 5 V supply for an out-of-tolerance condition. When VCC is out of
tolerance, the circuit write protects the SRAM, providing a high degree of data security in the
midst of unpredictable system operation brought on by low VCC. As VCC falls below the
battery backup switchover voltage (VSO), the control circuitry connects the battery which
maintains data and clock operation until valid power returns.
Table 2.
Operating modes
Note:
X = VIH or VIL; VSO = Battery backup switchover voltage.
Mode
VCC
E1
E2
G
W
DQ0-DQ7
Power
Deselect
4.75 to 5.5 V
or
4.5 to 5.5 V
VIH
XXX
High Z
Standby
Deselect
X
VIL
X
High Z
Standby
WRITE
VIL
VIH
XVIL
DIN
Active
READ
VIL
VIH
VIL
VIH
DOUT
Active
READ
VIL
VIH
High Z
Active
Deselect
VSO to VPFD
(min)(1)
1.
See Table 11 on page 24 for details.
X
High Z
CMOS standby
Deselect
≤ VSO(1)
X
High Z
Battery backup mode
相關(guān)PDF資料
PDF描述
M48T58Y-70MH1E 0 TIMER(S), REAL TIME CLOCK, PDSO28
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M48T58-70PC1E 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0V, 64 Kbit (8 Kb x 8) TIMEKEEPER SRAM
M48T58-70PC1EE 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0V, 64 Kbit (8 Kb x 8) TIMEKEEPER SRAM
M48T58-70PC1F 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0V, 64 Kbit (8 Kb x 8) TIMEKEEPER SRAM
M48T58-70PC1FE 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0V, 64 Kbit (8 Kb x 8) TIMEKEEPER SRAM
M48T58-70PC1TR 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0V, 64 Kbit (8 Kb x 8) TIMEKEEPER SRAM
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