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參數(shù)資料
| 型號(hào)： | M48T513Y-70PM1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDIP36 |
| 封裝： | 0.600 INCH, PLASTIC, MODULE, DIP-36 |
| 文件頁數(shù)： | 7/18頁 |
| 文件大小： | 134K |
| 代理商： | M48T513Y-70PM1 |
15/18
M48T513Y, M48T513V
Table 13. Reset AC Characteristics
(TA = 0 to 70 °C, VCC = 3.0V to 3.6V or VCC = 4.5V to 5.5V)
Note: 1. CL = 5pF (see Figure 4)
Symbol
Parameter
Min
Max
Unit
tR
RSTIN Low to RST Low
20
100
ms
tRHRZ
(1)
RSTIN High to RST Hi-Z
40
200
ms
Figure 14. RSTIN Timing Waveform
AI02585
tRHRZ
RSTIN
RST
tR
Hi-Z
POWER SUPPLY DECOUPLING
and UNDERSHOOT PROTECTION
Note: ICC transients, including those produced by
output switching, can produce voltage fluctua-
tions, resulting in spikes on the VCC bus. These
transients can be reduced if capacitors are used to
store energy, which stabilizes the VCC bus. The
energy stored in the bypass capacitors will be re-
leased as low going spikes are generated or ener-
gy will be absorbed when overshoots occur. A
ceramic bypass capacitor value of 0.1 microfarad
is recommended in order to provide the needed fil-
tering. In addition to transients that are caused by
normal SRAM operation, power cycling can gener-
ate negative voltage spikes on VCC that drive it to
values below VSS by as much as one volt. These
negative spikes can cause data corruption in the
SRAM while in battery backup mode. To protect
from these voltage spikes, ST recommends con-
necting a schottky diode from VCC to VSS (cathode
connected to VCC, anode to VSS). (Schottky diode
1N5817 is recommended for through hole and
MBRS120T3 is recommended for surface mount).
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