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參數(shù)資料
| 型號： | M48T251Y-70PM1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時鐘/數(shù)據(jù)恢復(fù)及定時提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDIP32 |
| 封裝： | PLASTIC, MODULE, DIP-32 |
| 文件頁數(shù)： | 24/24頁 |
| 文件大?。?/td> | 366K |
| 代理商： | M48T251Y-70PM1 |
9/24
M48T251Y, M48T251V
Table 3. Memory AC Characteristics, M48T251Y
Note: 1. Valid for Ambient Operating Temperature: TA = 0 to 70°C; VCC = 4.5 to 5.5V or 3.0 to 3.6V (except where noted).
2. These parameters are sampled with a 5 pF load are not 100% tested.
3. tWP is specified as the logical AND of CE and WE. tWP is measured from the latter of CE or WE going low to the earlier of CE or
WE going high.
4. tDH and tDS are measured from the earlier of CE or WE going high.
Symbol
Parameter(1)
M48T251Y–70
Unit
Min
Max
tAVAV
tRC
READ Cycle Time
70
ns
tAVQV
tACC
Access Time
70
ns
tELQV
tCO
Chip Enable Low to Output Valid
70
ns
tGLQV
tOE
Output Enable Low to Output Valid
35
ns
tELQX
tGLQX
tCOE
Chip Enable or Output Enable Low to Output Transition
5
ns
tAXQX
tOH
Output Hold from Address Change
5
ns
tEHQZ
tGHQZ
tOD
(2)
Chip Enable or Output Enable High to Output Hi-Z
25
ns
tWLQZ
tODW
(2)
Output Hi-Z from WE
25
ns
tAVAV
tWC
WRITE Cycle Time
70
ns
tWLWH
tELEH
tWP
(3)
WE, CE Pulse Width
50
ns
tAVEL
tAVWL
tAW
Address Setup Time
0
ns
tEHAX
tWR1
WRITE Recovery Time
15
ns
tWHAX
tWR2
Address Hold Time from WE
0ns
tWHQX
tOEW
Output Active from WE
5ns
tDVEH
tDVWH
tDS
(4)
Data Setup Time
30
ns
tWHDX
tDH1
(4)
Data Hold Time from WE
0ns
tEHDX
tDH2
(4)
Data Hold Time from CE
10
ns
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| M48T251Y-70PM1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.3V, 4096K TIMEKEEPER SRAM with PHANTOM |
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