- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98007 > M48T18-150MH1TR (STMICROELECTRONICS) 0 TIMER(S), REAL TIME CLOCK, PDSO28 PDF資料下載
參數(shù)資料
| 型號(hào)： | M48T18-150MH1TR |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封裝： | 0.330 INCH, SNAPHAT, PLASTIC, SOH-28 |
| 文件頁數(shù)： | 2/29頁 |
| 文件大?。?/td> | 184K |
| 代理商： | M48T18-150MH1TR |
第1頁當(dāng)前第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
M48T08, M48T18
10/29
READ Mode
The M48T08/18 is in the READ Mode whenever W
(WRITE Enable) is high, E1 (Chip Enable 1) is low,
and E2 (Chip Enable 2) is high. The device archi-
tecture allows ripple-through access of data from
eight of 65,536 locations in the static storage ar-
ray. Thus, the unique address specified by the 13
address inputs defines which one of the 8,192
bytes of data is to be accessed. Valid data will be
available at the Data I/O pins within address ac-
cess time (tAVQV) after the last address input sig-
nal is stable, providing that the E1, E2, and G
access times are also satisfied. If the E1, E2 and
G access times are not met, valid data will be
available after the latter of the Chip Enable Access
times (tE1LQV or tE2HQV) or Output Enable Access
time (tGLQV).
The state of the eight three-state Data I/O signals
is controlled by E1, E2 and G. If the outputs are ac-
tivated before tAVQV, the data lines will be driven to
an indeterminate state until tAVQV. If the address
inputs are changed while E1, E2 and G remain ac-
tive, output data will remain valid for Output Data
Hold time (tAXQX) but will go indeterminate until the
next address access.
Figure 8. READ Mode AC Waveforms
Note: WRITE Enable (W) = High.
AI00962
tAVAV
tAVQV
tAXQX
tE1LQV
tE1LQX
tE1HQZ
tGLQV
tGLQX
tGHQZ
VALID
A0-A12
E1
G
DQ0-DQ7
tE2HQV
tE2HQX
VALID
tE2LQZ
E2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M48T254V-10ZA1 | REAL TIME CLOCK, PBGA168 |
| M48T513V-70CS1 | 0 TIMER(S), REAL TIME CLOCK, PDSO32 |
| M48T513Y-85PL1 | 0 TIMER(S), REAL TIME CLOCK, DMA36 |
| M48T558YMH1 | 0 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M48T558YMH1TR | 0 TIMER(S), REAL TIME CLOCK, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48T18-150PC | 制造商:STMicroelectronics 功能描述:SRAM TIMEKEEPER 64K 48T18 DIP28 制造商:STMicroelectronics 功能描述:IC, TIMEKEEPER, YY-MM-DD-dd, 8KX8, DIP28, Date Format:YY-MM-DD-dd, Clock Format: |
| M48T18-150PC | 制造商:STMicroelectronics 功能描述:SRAM TIMEKEEPER 64K 48T18 DIP28 |
| M48T18-150PC1 | 功能描述:實(shí)時(shí)時(shí)鐘 64K (8Kx8) 150ns RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| M48T18-150PC1E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Kbit 8Kb x 8 TIMEKEEPER SRAM |
| M48T18-150PC1F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Kbit 8Kb x 8 TIMEKEEPER SRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。