參數(shù)資料
型號: M41T63Q6F
廠商: STMICROELECTRONICS
元件分類: 時鐘/數(shù)據(jù)恢復及定時提取
英文描述: 1 TIMER(S), REAL TIME CLOCK, QCC16
封裝: 3 X 3 MM, LEAD FREE, QFN-16
文件頁數(shù): 8/40頁
文件大?。?/td> 707K
代理商: M41T63Q6F
Operation
M41T62/63/64/65
Doc ID 10397 Rev 12
2.3
WRITE mode
In this mode the master transmitter transmits to the M41T6x slave receiver. Bus protocol is
shown in
Figure 19 on page 16. Following the START condition and slave address, a logic '0'
(R/W=0) is placed on the bus and indicates to the addressed device that word address “An”
will follow and is to be written to the on-chip address pointer. The data word to be written to
the memory is strobed in next and the internal address pointer is incremented to the next
address location on the reception of an acknowledge clock. The M41T6x slave receiver will
send an acknowledge clock to the master transmitter after it has received the slave address
see
Figure 16 on page 14 and again after it has received the word address and each data
byte.
Figure 19. WRITE mode sequence
AI00591
BUS ACTIVITY:
AC
K
S
AC
K
AC
K
AC
K
AC
K
ST
OP
ST
AR
T
P
SDA LINE
BUS ACTIVITY:
MASTER
R/W
DATA n
DATA n+1
DATA n+X
WORD
ADDRESS (An)
SLAVE
ADDRESS
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