參數(shù)資料
型號(hào): M41T315Y-65MH6F
廠商: 意法半導(dǎo)體
英文描述: Serial Access Phantom RTC Supervisor
中文描述: 串行訪問幻影時(shí)鐘監(jiān)
文件頁數(shù): 12/24頁
文件大?。?/td> 404K
代理商: M41T315Y-65MH6F
M41T315Y*, M41T315V, M41T315W
12/24
Data Retention
Most low power SRAMs on the market today can
be used with the M41T315Y/V/W. There are, how-
ever some criteria which should be used in making
the final choice of an SRAM to use. The SRAM
must be designed in a way where the chip enable
input disables all other inputs to the SRAM. This
allows inputs to the M41T315Y/V/W and SRAMs
to be Don’t Care once V
CCI
falls below V
PFD
(min).
The SRAM should also guarantee data retention
down to V
CC
=2.0 volts. The chip enable access
time must be sufficient to meet the system needs
with the chip enable output propagation delays
included. If the SRAM includes a second chip
enable pin (E2), this pin should be tied to V
OUT
.
If data retention lifetime is a critical parameter for
the system, it is important to review the data reten-
tion current specifications for the particular
SRAMs being evaluated. Most SRAMs specify a
data retention current at 3.0 volts. Manufacturers
generally specify a typical condition for room tem-
perature along with a worst case condition (gener-
ally at elevated temperatures). The system level
requirements will determine the choice of which
value to use. The data retention current value of
the SRAMs can then be added to the I
BAT
value of
the M41T315Y/V/W to determine the total current
requirements for data retention. The available bat-
tery capacity for the SNAPHAT
of your choice
can then be divided by this current to determine
the amount of data retention available (see
Table
17., page 22
).
For a further more detailed review of lifetime calcu-
lations, please see Application Note AN1012.
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