參數(shù)資料
型號: M41T256YMT7
廠商: STMICROELECTRONICS
元件分類: 時鐘/數(shù)據(jù)恢復及定時提取
英文描述: 0 TIMER(S), REAL TIME CLOCK, PDSO44
封裝: 0.330 INCH, PLASTIC, SOIC-44
文件頁數(shù): 9/27頁
文件大?。?/td> 523K
代理商: M41T256YMT7
17/27
M41T256Y
Two methods are available for ascertaining how
much calibration a given M41T256Y may require.
The first involves setting the clock, letting it run for
a month and comparing it to a known accurate ref-
erence and recording deviation over a fixed period
of time. Calibration values, including the number of
seconds lost or gained in a given period, can be
found in Application Note AN934: TIMEKEEPER
CALIBRATION. This allows the designer to give
the end user the ability to calibrate the clock as the
environment requires, even if the final product is
packaged in a non-user serviceable enclosure.
The designer could provide a simple utility that ac-
cesses the Calibration byte.
The second approach is better suited to a manu-
facturing environment, and involves the use of the
FT pin. The pin will toggle at 512Hz, when the Stop
Bit (ST) is '0,' and the Frequency Test Bit (FT) is
'1.'
Any deviation from 512Hz indicates the degree
and direction of oscillator frequency shift at the test
temperature.
For
example,
a
reading
of
512.010124Hz would indicate a +20 ppm oscillator
frequency error, requiring a –10 (XX001010) to be
loaded into the Calibration Byte for correction.
Note that setting or changing the Calibration Byte
does not affect the Frequency Test output fre-
quency.
The FT pin is an open drain output which requires
a pull-up resistor to VCC for proper operation. A
500 to 10k resistor is recommended in order to
control the rise time. The FT Bit is cleared on pow-
er-down.
Battery Low Warning
The M41T256Y automatically performs battery
voltage monitoring upon power-up. The Battery
Low (BL) Bit, Bit D7 of Day Register, will be assert-
ed if the battery voltage is found to be less than ap-
proximately 2.5V. The BL Bit will remain asserted
until completion of battery replacement and sub-
sequent battery low monitoring tests, during the
next power-up sequence.
If a battery low is generated during a power-up se-
quence, this indicates that the battery is below ap-
proximately 2.5 volts and may not be able to
maintain data integrity in the SRAM. Data should
be considered suspect and verified as correct. A
fresh battery should be installed. The battery may
be replaced while VCC is applied to the device.
The M41T256Y only monitors the battery when a
nominal VCC is applied to the device. Thus appli-
cations which require extensive durations in the
battery back-up mode should be powered-up peri-
odically (at least once every few months) in order
for this technique to be beneficial. Additionally, if a
battery low is indicated, data integrity should be
verified upon power-up via a checksum or other
technique.
Preferred Power-on/Battery Attach Defaults
See Table 4, below.
Table 4. Preferred Default Values
Note: 1. X = Undetermined; UC = Unchanged
Condition
WC
TEB(1)
TB(1)
FT
ST(1)
SLP(1)
Battery Attach or Initial Power-up
0
X
0
X
Power-Cycling (with battery)
0
UC
0
UC
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