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參數(shù)資料
| 型號： | M41T0M6T |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | SERIAL REAL-TIME CLOCK |
| 中文描述： | 串行實(shí)時時鐘 |
| 文件頁數(shù)： | 12/20頁 |
| 文件大?。?/td> | 260K |
| 代理商： | M41T0M6T |
M41T0
12/20
READ Mode
In this mode, the master reads the M41T0 slave
after setting the slave address (see
Figure 9.
). Fol-
lowing the WRITE Mode Control Bit (R/W = 0) and
the Acknowledge Bit, the word address An is writ-
ten to the on-chip address pointer. Next the
START condition and slave address are repeated,
followed by the READ Mode Control Bit (R/W = 1).
At this point, the master transmitter becomes the
master receiver. The data byte which was ad-
dressed will be transmitted and the master receiv-
er will send an Acknowledge Bit to the slave
transmitter. The address pointer is only increment-
ed on reception of an Acknowledge Bit. The
M41T0 slave transmitter will now place the data
byte at address A
n+1
on the bus. The master re-
ceiver reads and acknowledges the new byte and
the address pointer is incremented to A
n+2
.
This cycle of reading consecutive addresses will
continue until the master receiver sends a STOP
condition to the slave transmitter.
An alternate READ Mode may also be implement-
ed, whereby the master reads the M41T0 slave
without first writing to the (volatile) address point-
er. The first address that is read is the last one
stored in the pointer (see
Figure 11., page 13
).
WRITE Mode
In this mode the master transmitter transmits to
the M41T0 slave receiver. Bus protocol is shown
in
Figure 12., page 13
. Following the START con-
dition and slave address, a logic '0' (R/W = 0) is
placed on the bus and indicates to the addressed
device that word address An will follow and is to be
written to the on-chip address pointer. The data
word to be written to the memory is strobed in next
and the internal address pointer is incremented to
the next memory location within the RAM on the
reception of an acknowledge clock. The M41T0
slave receiver will send an acknowledge clock to
the master transmitter after it has received the
slave address and again after it has received the
word address and each data byte (see
Figure 9.
).
Figure 9. Slave Address Location
AI00602
R/W
SLAVE ADDRESS
START
A
0
1
0
0
0
1
1
M
L
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M41T0DS6F | SERIAL REAL-TIME CLOCK |
| M41T0DS6T | SERIAL REAL-TIME CLOCK |
| M41T0M6E | SERIAL REAL-TIME CLOCK |
| M41T0M6F | SERIAL REAL-TIME CLOCK |
| M41T11 | 512 bit 64b x8 Serial Access TIMEKEEPER SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M41T0-SKT | 制造商:P&S 功能描述:Serial Real-Time Clock 制造商:P&S 功能描述:Serial RTC |
| M41T11 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 bit 64b x8 Serial Access TIMEKEEPER SRAM |
| M41T11_08 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Serial real-time clock with 56 bytes of NVRAM |
| M41T11_11 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Serial real-time clock (RTC) with 56 bytes of NVRAM |
| M41T11M | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 bit 64b x8 Serial Access TIMEKEEPER SRAM |
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