參數(shù)資料
型號: M41T00M
廠商: 意法半導(dǎo)體
英文描述: Serial Access TIMEKEEPER
中文描述: 串行訪問計時
文件頁數(shù): 11/15頁
文件大?。?/td> 99K
代理商: M41T00M
11/15
M41T00
For example, a reading of 512.01024Hz would in-
dicate a +20ppm oscillator frequency error, requir-
ing a –10(XX001010) to be loaded into the
Calibration Byte for correction. Note that setting or
changing the Calibration Byte does not affect the
Frequency test output frequency.
OUTPUT DRIVER PIN
When the FT bit is not set, the FT/OUT pin be-
comes an output driver that reflects the contents of
D7 of the control register. In other words, when D6
of location 7 is a zero and D7 of location 7 is a zero
and then the FT/OUT pin will be driven low.
Note:
The FT/OUT pin is open drain which re-
quires an external pull-up resistor.
POWER-ON DEFAULTS
Upon initial application of power to the device, the
FT bit will be set to a '0' and the OUT bit will be set
to a '1'. All other Register bits will initially power-on
in a random state.
Two methods are available for ascertaining how
much calibration a given M41T00 may require.
The first involves simply setting the clock, letting it
run for a month and comparing it to a known accu-
rate reference (like WWV broadcasts). While that
may seem crude, it allows the designer to give the
end user the ability to calibrate his clock as his en-
vironment may require, even after the final product
is packaged in a non-user serviceable enclosure.
All the designer has to do is provide a simple utility
that accessed the Calibration byte.
The second approach is better suited to a manu-
facturing environment, and involves the use of
some test equipment. When the Frequency Test
(FT) bit, the seventh-most significant bit in the
Control Register, is set to a '1', and the oscillator is
running at 32,768Hz, the FT/OUT pin of the device
will toggle at 512Hz. Any deviation from 512Hz in-
dicates the degree and direction of oscillator fre-
quency shift at the test temperature.
Figure 13. Clock Calibration
AI00594B
NORMAL
POSITIVE
CALIBRATION
NEGATIVE
CALIBRATION
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