參數(shù)資料
型號: M41ST85YMX
廠商: 意法半導(dǎo)體
英文描述: 5.0 OR 3.0V, 512 bit 64 x 8 SERIAL RTC and NVRAM SUPERVISOR
中文描述: 5.0或3.0V,512位64 × 8串行時鐘和NVRAM督導(dǎo)員
文件頁數(shù): 20/33頁
文件大小: 464K
代理商: M41ST85YMX
M41ST85Y, M41ST85W
20/33
The IRQ/FT/OUT output is cleared by a READ to
the Flags Register. A subsequent READ of the
Flags Register is necessary to see that the value
of the Alarm Flag has been reset to '0.'
The IRQ/FT/OUT pin can also be activated in the
battery back-up mode. The IRQ/FT/OUT will go
low if an alarm occurs and both ABE (Alarm in Bat-
tery Back-up Mode Enable) and AFE are set. The
ABE and AFE Bits are reset during power-up,
therefore an alarm generated during power-up will
only set AF. The user can read the Flag Register
at system boot-up to determine if an alarm was
generated while the M41ST85Y/W was in the de-
select mode during power-up. Figure 19, page 21
illustrates the back-up mode alarm timing.
Figure 18. Alarm Interrupt Reset Waveform
Table 9. Alarm Repeat Modes
RPT5
RPT4
RPT3
RPT2
RPT1
Alarm Setting
1
1
1
1
1
Once per Second
1
1
1
1
0
Once per Minute
1
1
1
0
0
Once per Hour
1
1
0
0
0
Once per Day
1
0
0
0
0
Once per Month
0
0
0
0
0
Once per Year
AI03664
IRQ/FT/OUT
ACTIVE FLAG
0Fh
0Eh
10h
HIGH-Z
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