參數(shù)資料
型號: M41ST84W-70MQ6
廠商: STMICROELECTRONICS
元件分類: 時鐘/數(shù)據(jù)恢復及定時提取
英文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO16
封裝: PLASTIC, SOIC-16
文件頁數(shù): 8/32頁
文件大?。?/td> 168K
代理商: M41ST84W-70MQ6
M41ST84Y, M41ST84W
16/32
Setting Alarm Clock Registers
Address locations 0Ah-0Eh contain the alarm set-
tings. The alarm can be configured to go off at a
prescribed time on a specific month, date, hour,
minute, or second or repeat every year, month,
day, hour, minute, or second. It can also be pro-
grammed to go off while the M41ST84Y/W is in the
battery back-up to serve as a system wake-up call.
Bits RPT5-RPT1 put the alarm in the repeat mode
of operation. Table 4, page 17 shows the possible
configurations. Codes not listed in the table default
to the once per second mode to quickly alert the
user of an incorrect alarm setting.
When the clock information matches the alarm
clock settings based on the match criteria defined
by RPT5-RPT1, the AF (Alarm Flag) is set. If AFE
(Alarm Flag Enable) is also set, the alarm condi-
tion activates the IRQ/FT/OUT pin. The IRQ/FT/
OUT output is cleared by a read to the Flags reg-
ister. This read of the Flags register will also reset
the Alarm Flag (D6; Register 0Fh).
The IRQ/FT/OUT pin can also be activated in the
battery back-up mode. The IRQ/FT/OUT will go
low if an alarm occurs and both ABE (Alarm in Bat-
tery Back-up Mode Enable) and AFE are set. The
ABE and AFE bits are reset during power-up,
therefore an alarm generated during power-up will
only set AF. The user can read the Flag Register
at system boot-up to determine if an alarm was
generated while the M41ST84Y/W was in the de-
select mode during power-up. Figure 14 illustrates
the back-up mode alarm timing.
Figure 14. Back-Up Mode Alarm Waveform
AI03920
VCC
IRQ/FT/OUT
VPFD
AFE bit in Interrupt Register
AF bit in Flags Register
HIGH-Z
VSO
HIGH-Z
tREC
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